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memory products - Al Kossow's Bitsavers

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M93D6FUNCTIONAL DESCRIPTIONThe input and output pins are controlled byseparate serial formats. Seven 9-bit instruction canbe executed. The instruction format as a logical "1"has a start bit, four bits as an op code, and fourbits of address. The on-chip programming voltagegenerator allows the user to use a single power supply(Vce). The serial output (DO) pin is valid onlyduring the read mode. During all other modes theDO pin is in high impedance state, eliminating buscontention.READThe read instruction is the only instruction whichoutputs serial data on the DO pin. After a READinstruction is received, the instruction and addressare decoded, followed by data transfer from the <strong>memory</strong>register into a 16 bit serial out shift register.A dummy bit (logical "0") preceds the 16 bit dataoutput string. The output data changes during thehigh state of the system clock.ERASEIWRITE ENABLE AND DISABLEProgramming must be preceded once by programmingenable (EWEN) instruction. Programming remainsenabled until a programming disable(EWDS) instruction in executed. The programmingdisable instruction is provided to protect againstaccidental data disturbance.Execution of a READ instruction is independent ofboth EWEN and EWDS instructions.ERASELike most EEPROMs, the register must first be erased(all bits set to 1 s) before the register canbe written (certain bits set to Os). After an ERASEinstruction is input, CS is dropped low. This fallingedge of CS determines the start of programming.The register at the address specified in the instructionis then set entirely to 1 s. When the erase/writeprogramming time (tE/w) constraint has beensatisfied, CS is brought up for at least one SK period.A new instruction may then be input, or a lowpower standby state may be achieved by droppingCS low.WRITEThe WRITE instruction is followed by 16 bits of datawhich are written into the specified address. Thisregister must have been previously erased. Likeany programming mode, erase/write time is determinedby the low state of CS following the instruction.The on chip high voltage section onlygenerates high voltage during this programmingmode, which prevents spurious programming duringother modes. When CS rises to V1H, the programmingcycles ends. <strong>Al</strong>l programming modeshould be ended with CS high for one SK period,or followed by another instruction.CHIP WRITEEntire chip can be written for ease of testing. Writingthe chip means that all registers in the <strong>memory</strong>array have each bytes set as the byte sent withthe instruction.CHIP ERASEEntire chip erasing is provided for ease of programming.Erasing the chip means that all registers inthe <strong>memory</strong> array have each bit set to a 1. Eachregister is then ready for a WRITE instruction.INSTRUCTION SETInstruction 58 Op Code AddressREAD 1 10XX A3A2A1AOWRITE 1 01XX A3A2A1AOERASE 1 11XX A3A2A1AOEWEN 1 0011 X X X XEWDS 1 0000 XXXXERAL 1 0010 XXXXWRAL 1 0001 XXXXDataD15-DOD15-DOCommentsRead register A3A2A 1 AOWrite register A3A2A 1 AOErase register A3A2A 1 AOErase/write enableErase/write disableErase all registersWrite all registers4/6214

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