memory products - Al Kossow's Bitsavers

MK41H66/MK41 H67(N, P)-20/25/35WRITE MODEThe MK41H66n is in the Write Mode whenever theWE and 'CE/es inputs are in the low state. CE/~or WE must be high during address transitions. Addressesmust be held valid throughout a write cycle.The Write b~s with the concurrence of a lowon WE and 'CE les. Therefore, tAS is referenced tothe latter occurring edge of CE/es, or WE.If the output is enabled (CE/es is low), then WEwill return the output to high impedance withintWEz of its falling edge. Data-In must remain validtOH after the rising edge of CE/es or WE.FIGURE 3. WRITE-WRITE-WRITE-READ TIMING-----o-f+---.. ,I IQWRITE CYCLE TIMINGAC ELECTRICAL CHARACTERISTICS(O"CsTAs70"C) (Vee = 5.0 V ± 10 percent)SYM PARAMETERMK41H6X-20 MK41H6X-25 MK41H6X-35MIN MAX MIN MAX MIN MAX UNITS NOTEStwc Write Cycle Time 20 25 35 nstAS Address Setup Time 0 0 0 nstAW Address Valid to End of Write 16 20 30 nstAH Address Hold after End of Write 0 0 0 nstew Chip Enable/Select to End of Write 18 22 32 nstWEW Write Enable to End of Write 16 20 30 nstos Data Setup Time 12 14 15 nstoti Data Hold Time 0 0 0 nstWEL Write Enable to Low-Z 5 5 5 ns 23110479