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memory products - Al Kossow's Bitsavers

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MK4511(N,K)-12115/20DUAL PORT OPERATIONSnot affect the status of the Port X Interrupt Register.INTERRUPT CONTROLThe lower three bits of each byte written to the topand bottom addresses are the ones routed simul­<strong>Al</strong>though the Interrupt Control Registers for each taneo"usly to the Interrupt Control Registers. The Inportare accessed in parallel with RAM locations terrupt Control Registers consists of three flip-flopsOOOH and 1FFH, they do not reside within the RAM per port that serve as the Interrupt Request/Cancelarray. They do not derive their control Inputs from flag (REQlCAN), Interrupt Output Enable/Disablethe RAM cells' Status. In fact, changing the RAM flag (ENAIDiS) and Interrupt Acknowledge/Readylocation's contents via an opposite port will not af- flag (ACKlRDY). As Figure 5 shows, the logic atfecta Interrupt Control Register at all. Therefore, tached to the Interrupt Control Registers interpretsfor example, Port Y writing to address OOOH can- interrupt status and drives the Interrupt Outputs.FIGURE 5. MK4511 INTERRUPT CONTROL REGISTERS AND INTERRUPT LOGICINTx~~-------------'INTyENAJDISENAIDISADx,--__ .I 0QQ 0 ADy,CKCKREQ/CAN0 QADyoCKCOWMNOxROW 127yCOWMN 3yINTERRUPT BYTE STRUCTUREBecause only the lower 3 bits of each interrupt byteare used to control the interrupt logic, the six MSBswritten to the RAM have no affect on the state ofthe interrupt outputs,and may be used for any otherpurpose. The functions of the three control bits are:Inter~ Output Enable/DlsableEN<strong>Al</strong>mlx (AOx,) and EN<strong>Al</strong>DiSy (ADy1)Each port can disable its own interrupt o..!ill1.uts bywriting a 0 (XXXXXXXOX 2) into its ENAIDIS bit. Ifdisabled, the interrupt pin will remain high regardlessof interrupt requests from the other port. If aninterrupt is requested of a disabl~rt, and an enabling1 is later written into ENAIDIS of the disabledport, the interrupt output will go low tWIL following therising edge of the enabling write. Disabling a port withan active interrupt output pin will result in the outputgoing high twlH after the end of the disabling write.5111433

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