memory products - Al Kossow's Bitsavers

M27C1024DEVICE OPERATIONThe modes of operations of the M27C1024 are listedin the Operating Modes. A single 5V powersupply is required in the read mode. All inputs areTTL levels except for 12V on A9 for Electronic Signature.READ MODEThe M27C1024 has two control functions, both ofwhich must be logically active in order to obtain dataat the outputs. Chip Enable (CE) is the powercontrol and should be used for device selection.Output Enable (OE) is the output control and shouldbe used to gate data to the output pins, independentof device selection. Assuming that addressesare stable, the address access time (tAccl is equalto the delay from CE to output (tCE). Data is availableat the o'!:!!puts after delay al!oE from the faIlingedge of OE, assuming that CE has been lowand addresses have been stable for at leasttACC-tOE·The supply current, Icc, has three segments thatare of interest to the system designer: the standbycurrent level, the active Current level, and transientcurrent peaks that are produced by the fallingand rising edges of CE. The magnitude of this transientcurrent peaks is dependent on the output capacitiveand inductive loading of the device. Theassociated transient voltage peaks can be suppressedby complying with the two line output controland by properly selected decoupling capacitors. Itis recommended that a 1 I'F ceramic capacitor beused on every device between Vcc and GND. Thisshould be a high frequency capacitor of low inherentinductance and should be placed as close tothe device as possible. In addition, a 4.7 I'F bulkelectrolytic capacitors should be used betweenVcc and GND for every eight devices. The bulk capacitorshould be located near where the powersupply is connected to the array.The purpose of the bulk capacitor is to overcomethe voltage drop caused by the inductive effectsof PCB traces.STANDBY MODEThe M27C1024 has a standby mode which reducesthe maximum active power current from 50 mAto 1 mAo The M27C1024 is placed in the standbymode by applying a TTL high signal to the CE input.When in the standby mode, the outputs arein a high impedance state, independent of the OEinput.TWO LINE OUTPUT CONTROLBecause EPROMs are usually used in larger memoryarrays, the product features a 2 line controlfunction which accommodates the use of multiplememory connection. The two line control functionallows:a) the lowest possible memory power dissipationb) complete assurance that output bus contentionwill not occur.For the most efficient use of these two control lines,CE should be decoded and used as the primarydevice selecting function, while OE shouldbe made a common connection to all devices inthe array and connected to the READ line from thesystem control bus. This assures that all deselectedmemory devices are in their low power standbymode and that the output pins are only activewhen data is desired from a particular memorydevice.SYSTEM CONSIDERATIONSThe power switching characteristics of CMOS-E4EPROMs require careful decoupling of the devices.PROGRAMMINGCaution: exceeding 14Von Vpppin will permanentlydamage the M27C 1 024.When delivered, and after each erasure, all bits ofthe M27C1024 are in the "1" state. Data is introducedby selectively programming "Os" into the desiredbit locations. Although only "Os" will be programmed,both "1s" and "Os" can be present inthe data word. The only way to change a "0" toa "1" is by ultraviolet light erasure. The M27C10,24is in the programming mode when Vpp input is at12.5V and CE and PGM are at TTL-low.The data to be programmed is applied 16 bits inparallel to the data output pins. The levels requiredfor the address and data inputs are TTL.Vee is specified to be 6.25V ±0.25V.VERY FAST AND RELIABLE PROGRAMMINGALGORITHM = PRESTO IIPRESTO II programming algorithm, available forthe M27C1024 is an enhancement of the PRESTOalgorithm used for the M27512.During programming and verify operation a MAR­GIN MODETM Circuit is automatically activated. Itprovides adequate margin on threshold voltage ofprogrammed cells, thus writing margin is independentfrom Vee in verify mode and over programpulse is not necessary, reducing programming timedown to a theoretical value of 6 seconds.5/10137