memory products - Al Kossow's Bitsavers

~ SGS-1HOMSON~ ~ L [jiVA]D©OO@rn[1,rn©'iJ'OO@~D©~MK41H80(N,P)-20/25/354K x 4 CMOS TAGRAMTM• 4K x 4 SRAM WITH ONBOARD 4 BIT COM­PARATOR• 20, 25, AND 35ns ADDRESS TO COMPARE AC­CESS TIME• 12, 15, AND 20ns TAG DATA TO COMPARE AC­CESS TIME• EQUAL ACCESS, READ AND WRITE CYCLETIMES• FLASH CLEAR FUNCTION• 22-PIN, 300 MIL PLASTIC AND CERAMIC DIP• ALL INPUTS AND OUTPUTS ARE TTL COMPAT­IBLE, LOW CAPACITANCE, AND PROTECTEDAGAINST STATIC DISCHARGE• WORD WIDTH EXPANDABLETRUTH TABLEWE OE CLR MATCH MODEH H H Valid Compare CycleL X H Invalid Write CycleH L H Invalid Read CycleX X L Invalid Flash Clear CycleX = Don't CareDESCRIPTIONThe MK41H80 is a member of SGS.:rHOMSON's4K x 4 CMOS Static RAM family featuring fully staticOPlilflition requiring no external clocks or timingstrobes. Cycle Time and Compare Access Time areequal. The MK41H80 is powered by a single +5V±10% power supply and the inputs and outputs arefully TTL compatible.The MK41H80 features an onboard 4 bit comparatorthat compares RAM contents and current inputdata. The result is an active high match on theMATCH pin or an active low miss on the MATCHpin. The MATCH pins of several MK41H80's can benanded together to provide enabling or acknowledgingsignals to the data cache or processor.Tag data can be read from the data pins by bringingOutput Enable (OE) low. This will allow dataJune 1988.••. ~.~ ....... ~,NDIP-22(Plastic Package)22PDIP-22(Ceramic Package)FIGURE 1. PIN CONNECTIONSA.AsA.A7AsA.A,oA11OEWEvssPIN NAMESAo - A11DQo - DQ 3MATCHWEOECLRVeeVss123456789101122 vee21 A.20 A.19 A,18 Ao17 CLR16 CQ.15 CQ.14 CQ,13 CQo12 MATCH- Address Inputs- Data Input/Output- Comparator Output- Write Enable- Output Enable- Flash Clear- Power (+5V)- Groundstored in the memory array to be displayed at theOutputs (DQo-DQa).Flash Clear operation is provided on the MK41H80via the (CLR) pin. A low applied to the CLR pinclears all RAM bits to a logic zero.1/10355