memory products - Al Kossow's Bitsavers

MK41 H68/MK41 H69(N, P)-20/25/35WRITE MODEThe MK41H6819 is in the Write Mode whenever theWE and CE/CS inputs are in the low state. CE/CSor WE must be high during address transitions. Addressesmust be held valid throughout a write cycle.The Write b~s with the concurrence of a lowon WE and CE lCS. Therefor~ referenced tothe latter occurring edge of CEfCS, or WE.FIGURE 3. WRITE-WRITE-WRITE-READ TIMINGIf the output is enabled (CEfC"S is low), then WEwill return the outputs to high impedance withintWEZ of its falling edge. Care must be taken to avoidbus contention in this type of operation. Data-Inmust remain valid tOH after the rising edge ofCE/C"S or WE.CE/CSWEf---twC_________.I---twC------.I---Iwc----I-oo__--I.c-----I'",I.H"'_1Icw __ 1I I000·OQ3-----+ .)f-----f- VALtD IN -,\-----f:-WRITE CYCLE TIMINGAC ELECTRICAL CHARACTERISTICS(O°CSTAS70°C) (Vee = 5.0 V ± 10 percent)MK41H6X-20 MK41H6X-25 MK41H6X-35SYM PARAMETER MIN MAX MIN MAX MIN MAX UNITStwe Write Cycle Time 20 25 35 nstAS Address Setup Time 00 0 nstAW Address Valid to End of Write 16 20 30 nstAH Address Hold after End of Write 00 0 nstew Chip EnablefSelect to End of Write 1822 32 nstWEW Write Enable to End of Write 16 20 30 nstos Data Setup Time 1214 15 nstOH Data Hold Time 00 0 nstWEL Write Enable to Low-Z 55 5 nsNOTES23110489