memory products - Al Kossow's Bitsavers

M K4505M/4505S(N)-25/33/50DESCRIPTIONThe MK4505 is a Very High Speed 1K x 5 ClockedFIFO memory. It achieves its high performancethrough the use of a pipelined architecture, a 1.21'full CMOS, single poly, double level metal process,and a memory array constructed using SGS­THOMSON's 8 transistor BiPORT memory cell.The device is designed for use in applications wheredata is moving through a system on a square waveclock; applications such as digitized video and audio,image processing, A-to-D and D-to-A conversions,high speed data links, Radar return samplingor data tracing.FIGURE 2. BLOCK DIAGRAM MK4505M/4505SThe device is available in two versions; a Master,the MK4505M, and a Slave, the MK4505S. TheMaster provides all of the control signals necessaryfor reliable, full speed, fully asynchronous width expansionand/or depth expansion. The Master alsoprovides a full compliment of status flags, includingOutput Valid, Empty, Almost Empty, Half Full,Almost Full, Full, and Input Ready. The Master cannotbe written while Full or read while Empty. TheSlave, in contrast, can be forced to write and/or readcontinuously regardless of device status; a featureuseful in triggered data acquisitions, or for retransmit(repeat reading) applications.r-----------------~~------~~aHF-----------~~--------~--------~ FF,EF ~--------~--------~~------FLAG LOGIC~----------------_;--------~ff .-------------- --------~ 1-------- --------------....I 4505M IDR ..-------------- ---------1 FLAG 1"-----:---- ---------------..QyI LOGIC IAF .-------------- --- -----'1 1-------- --------------_AEL _____ ...J2/16442