memory products - Al Kossow's Bitsavers

M27512M27512 DESIGN INNOVATIONS FOR AN EFFI­CIENT PROGRAMMING PRESTOM27512 includes several design innovations to obtaina very efficient programming:- during programming the word line voltage isbootstrapped over the Vpp voltage by about 2V- the bit line voltage is regulated at the optimumvalue for fast write.This allows a reduction of about one order of magnitudein the programming time. The programmingis also independent of the Vpp voltage (fromabout 10V to 14V). The Vee voltage (6V during theAlgorithm) influences the programming speed sincethe cell drain voltage regulation uses Vee as a reference.The sensing scheme is also innovative in SGS­THOMSON M27512. The conventional sensingcompares the addressed cell within the memory arraywith a reference cell (usually one reference cellfor each word line) as shown in figure 1.Figure 1. Conventional Sensing Schematicteristics of the erased and the written cell in thememory array the "virtual" reference cell currentcan be drawn.The "virtual" reference cell current is the currentof the reference cell divided by the ratio betweenthe impedence of the left side loads and the. impedenceof the right side loads (usually the ratio rangesfrom 2 to 5),The figure 2 illustrates very well the dependanceof Vee (voltage on the addressed word line) on thethreshold shift of the cell: the sensing of a writtencell will not be correct where the "virtual" referencecell characteristic crosses and stays below the writtenceli characteristic (Vee max).The dependance of Vee max on the threshold shiftof a written cell can be illustrated as in figura 3,where the different lines are for different ratios betweenthe impedance of the loads.Figure 2 - Current relationship of reference and arraycells (Conventional Technique)ARRtAVV~ tELLWORD ----r-1ll'mLINEr---11 I REFERENCEG 6319Vcc5- 9787If the addressed cell is erased its current is the sameas the reference cell's current and the imbalanceat the inputs of the comparator (highervoltage on right side = 1) is obtained by connectinglower impedence load on the right side than on theleft.If the addressed cell is written (no current) the leftinput to the comparator will have a higher voltagethan the right side (0 state).The above approach has proven to be efficient andreliable but still shows a drawback that is the dependanceof the Vee operating range (at highVecl on the threshold shift of the written cell. Thiscan be easily understood by looking at the cell transcharacteristicsdiagram: together with the charac-Figure 3 - Dependance of Vee max on threshold shift(R = Loads impedance ratios) (conventional techniques)Vee maxR=3R=4Vth shift12/1584