memory products - Al Kossow's Bitsavers

MK48C02AI12A(K,N)-15/20/25OPERATIONRead ModeThe MK48C02A112A is in the Read Mode wheneverIN (Write Enable) is high and E (Chip Enable) is low,providing a ripple-through access of data from eightof 16,384 locations in the static storage array. Thus,the unique address specified by the 11 Address Inputs(An) defines which one of 2,048 bytes of datais to be accessed.Valid data will be available to the eight data OutputDrivers within tM after the last aQ.dress input signalis stable, providin.9 th~ the E and G accesstimes are satisfied. If E or G access times are notmet, data access will be measured from the limitingparameter (tCEA or tOEA>, rather than the address.The state of the eight Data 1/0 signals iscontrolled by the E and G control signals. The datalines may be in an indeterminate state between IoHand tM , but the data lines will always have validdata at tM .FIGURE 3. READ-READ-WRITE TIMINGREAOtRe~D(tAeREAD-rteEAI ~tAAI -'weWRITEI--t-tAS 'wR1lI tAW--jlXK=INt ! !DQ.-DQ 7---------{IAC ELECTRICAL CHARACTERISTICS (READ CYCLE TIMING)(0°CsTAs70°C) (VCC (Max}~Vcc~Vcc (Min))MK48CX2A·15 MK48CX2A·20 MK48CX2A·25SYM PARAMETER MIN MAX MIN MAXtRC Read Cycle Time 150 200tM Address Access Time 150 200tCEA Chip Enable Access Time 150 200tOEA Output Enable Access Time 75 80teEz Chip Enable Hi to High-Z 35 40tOEZ Output Enable Hi to High-Z 35 40tOH Valid Data Out Hold Time 15 15MIN MAX UNITS NOTES250 ns250 ns 1250 ns 190 ns 150 ns50 ns15 ns 1NOTE1. Measured using the Output Load Diagram shown in Figure 7.3/10291