Part-I - Controller General of Patents Designs and Trademarks

(12) PATENT APPLICATION PUBLICATION (21) Application No.1386/CHE/2011 A
(19) INDIA
(22) Date of filing of Application :21/04/2011 (43) Publication Date : 21/06/2013
(54) Title of the invention : OPTIMIZED MULTI-ROOT INPUT OUTPUT VIRTUALIZATION AWARE SWITCH
(51) International classification :H04L
(31) Priority Document No :NA
(32) Priority Date :NA
(33) Name of priority country :NA
(86) International Application No
:NA
Filing Date
:NA
(87) International Publication No : NA
(61) Patent of Addition to Application Number :NA
Filing Date
:NA
(62) Divisional to Application Number
:NA
Filing Date
:NA
(71)Name of Applicant :
1)INEDA SYSTEMS PVT. LTD
Address of Applicant :8-2-120/115/C, SUDHA ENCLAVE,
ROAD NO.2, BANJARA HILLS, HYDERABAD - 500 034
Andhra Pradesh India
(72)Name of Inventor :
1)KANIGICHERLA, BALAJI
2)PASUMARTHY, DHANUMJAI
3)HAIDER, SHABBIR
4)MEDEME, NAGA MURALI
5)KANAKARAJ, PAULRAJ
6)VAIDYA, TAPAN
(57) Abstract :
In one implementation, an optimized multi-root input-output virtualization (MRIOV) aware switch configured to route data
between multiple root complexes and I/O devices is described. The MRIOV aware switch may include two or more upstream
ports and one or more downstream ports. Each of an upstream port and a downstream port may include a media access controller
(MAC) configured to negotiate link width and link speed for exchange of data packets between the multiple root complexes and
the I/O devices. Each of an upstream port and a downstream port may further include a clocking module configured to
dynamically configure a clock rate of processing data packets based one or more negotiated link width and negotiated link speed,
and a data link layer (DLL) coupled to the MAC configured to operate at the clock rate, wherein the clock rate is indicative of
processing speed.
No. of Pages : 34 No. of Claims : 24
The Patent Office Journal 21/06/2013 13830