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Ion Implantation and Synthesis of Materials - Studium

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232 15 <strong>Ion</strong> <strong>Implantation</strong> in CMOS Technology: Machine Challengesalthough <strong>of</strong> significant technological interest for niche applications, has not yetachieved market adoption.15.5 Angle ControlOne <strong>of</strong> the enabling advantages ion implantation <strong>of</strong>fers is precise spatialplacement <strong>of</strong> the dopant within the device. There are however a number <strong>of</strong>situations that might lead to an error in placement, either in depth or in the lateraldirection. Energy contamination, discussed in an earlier section, can result in anerror in depth. Similarly, an error in the angular alignment <strong>of</strong> the beam can resultin an error in ion placement in the lateral direction. Control over the angularalignment <strong>of</strong> the beam is critical in modern implanters. Angular alignment <strong>of</strong> thebeam can be influenced by a number <strong>of</strong> factors including beam steering, beamdivergence, as well as the method <strong>of</strong> beam scan or endstation design. In thesubsections below we describe a number <strong>of</strong> endstation <strong>and</strong> scan configurationswhich can impact angle control. It is worthwhile to note that the need forimproved angle control for smaller devices on larger wafers has been a significantdriving force behind implanter development, particularly during the transitionfrom 125/150 to 200 <strong>and</strong> 300 mm wafers.15.5.1 Impact <strong>of</strong> Beam Steering Errors on Device PerformanceThe most general case <strong>of</strong> angular misalignment is the tilting <strong>of</strong> an otherwiseperfect (collimated <strong>and</strong> nondivergent) ion beam relative to the wafer normal. If thetilt <strong>of</strong> an extension implant is in the plane <strong>of</strong> the length dimension <strong>of</strong> a transistor, itwill result in an undercut <strong>of</strong> the gate stack on one side <strong>and</strong> shadowing <strong>of</strong> theextension by the gate stack on the other. It is apparent that any deleterious effectsdue to the shadowing <strong>and</strong> undercut would only worsen as the transistordimensions <strong>and</strong> thermal budgets shrink further. Device simulations show that atthe 65 nm node angle tilt errors on the order <strong>of</strong> 1° can lead to large deviations inthe transistor on current (I on ) from the nominal value, see Fig. 15.13.One technique for reducing the impact <strong>of</strong> beam steering errors is to employ aquad-mode implant, i.e., an implant whereby a quarter <strong>of</strong> the dose is implanted atazimuthal rotations <strong>of</strong> 0°, 90°, 180°, <strong>and</strong> 270°. For a beam steering angle <strong>of</strong> −1°, aquad implant restores I on to nearly the maximum value, provided that the tilt-angleis sufficiently large (see Fig. 15.14). A quad-mode implant can be executedefficiently on any endstation with in situ wafer repositioning. In this case verylittle time is wasted between the segments.

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