ModuleWare Reference Guide - Hornad

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Arithmetic PartsSubtractor (sub)Subtractor (sub)This part subtracts the input values of port din1 and scalar port cin fromthe port din0 and places the result in the output data port dout.The carry out from this result is placed in the scalar output port cout. Thesubtraction can be performed in signed and unsigned mode. The mode isselected by the parameter sign_type. Parameters cin_type and cout_typecontrol the polarity of ports cin and cout.This part is equivalent to an n-bit subtractor; where n is the width of theports din and dout. The implementation of the subtractor is controlled viathe synthesis script.If input port cin is unconnected, it is driven by 0.Functiondout= din0 - din1 - cinThe subtraction is signed or unsigned depending of the value of sign_type.If cout_type = ActiveHigh:cout = 1= 0if there is a carry out during subtractionotherwiseIf cout_type = ActiveLow:cout = 0= 1if there is a carry out during subtractionotherwiseTruth TablesAll the following examples are for positive polarities and cin = 0.Unsigned, 3-bit din0, din1 and dout:Table 6-43. Subtractor Truth Table — Unsigned, 3-bit din0, din1 and doutdin0 din1 dout cout000 010 110 1001 010 111 1010 010 000 0011 010 001 0100 010 110 0101 010 011 0110 010 100 0111 010 101 0130ModuleWare Reference Manual, Library Version 1.9September 18, 2008
Arithmetic PartsSubtractor (sub)Unsigned, 3-bit din0, 4-bit din1, 4-bit dout:Table 6-44. Subtractor Truth Table — Unsigned, 3-bit din0, 4-bit din1, 4-bitdoutdin0 din1 dout cout000 0010 1110 1001 0010 1111 1010 0010 0000 0011 0010 0001 0100 0010 0010 0101 0010 0011 0110 0010 0100 0111 0010 0101 0Unsigned, 3-bit din0, 4-bit din1, 5-bit dout:Table 6-45. Subtractor Truth Table — Unsigned, 3-bit din0, 4-bit din1, 5-bitdoutdin0 din1 dout cout000 0010 11110 1001 0010 11111 1010 0010 00000 0011 0010 00001 0100 0010 00010 0101 0010 00011 0110 0010 00100 0111 0010 00101 0Signed, 3-bit din0, din1 and dout:Table 6-46. Subtractor Truth Table — Signed, 3-bit din0, din1 and doutdin0 din1 dout cout000 010 110 0001 010 111 0010 010 000 0011 010 001 0ModuleWare Reference Manual, Library Version 1.9 131September 18, 2008
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ModuleWare Reference Manualfor the
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Table of ContentsGated OR (or1) . .
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Table of ContentsBufif0 Primitive (
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List of TablesTable 5-18. N-Way Spl
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List of TablesTable 7-20. RS Flip-F
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List of TablesTable 10-41. XNOR Pri
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IntroductionNaming ConventionsNamin
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IntroductionSupported VHDL Packages
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IntroductionReset/Clear BehaviorYou
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IntroductionSet/Preset BehaviorSet/
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IntroductionGate BehaviorFunctioncl
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IntroductionEnable/Load BehaviorFun
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IntroductionVHDL Coding StyleNotes
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IntroductionDesign Rule CheckingFor
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IntroductionSlice SupportOtherwise
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Logic PartsN-Input AND Gate (and)N-
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Logic PartsN-Input XOR Gate (xor)N-
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Logic PartsN-Input NOR Gate (nor)N-
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Logic PartsAssign (assignment)Assig
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Logic PartsBit Setter (bitset)suffi
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Logic PartsBus Driver (busdrive)Bus
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Logic PartsGated OR (or1)Gated OR (
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Logic PartsInverter (inv)Inverter (
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Logic PartsReduction OR (tor)Reduct
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Logic PartsThree-state Buffer (trib
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Logic PartsThree-state bus (tribus)
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Logic PartsVariable Width N-Input A
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Logic PartsVariable Width N-Input X
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ConstantsConstant Value (constval)C
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ConstantsPower (vdd)Power (vdd)This
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Combinatorial PartsDecoder, Separat
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Combinatorial PartsDecoder, Separat
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Combinatorial PartsDecoder, Combine
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Combinatorial PartsEncoder (encoder
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Combinatorial PartsN-Input Multiple
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Combinatorial PartsN-Input One-hot
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Combinatorial PartsN-Input One-hot
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Combinatorial PartsW-Bit Multiplexe
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Page 82 and 83: Bit Manipulation PartsN-Bus Merge (
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Page 86 and 87: Bit Manipulation PartsN-Way Splitte
Page 88 and 89: Bit Manipulation PartsN-Way Splitte
Page 90 and 91: Bit Manipulation PartsBus Fill (wor
Page 92 and 93: Bit Manipulation PartsFixed Bit Sel
Page 94 and 95: Bit Manipulation PartsFixed Shifter
Page 96 and 97: Bit Manipulation PartsFixed Shifter
Page 98 and 99: Arithmetic Parts181 ALU (alu181)181
Page 100 and 101: Arithmetic Parts181 ALU (alu181)ovf
Page 102 and 103: Arithmetic PartsAbsolute Value (abs
Page 104 and 105: Arithmetic PartsAccumulator (acc)ad
Page 106 and 107: Arithmetic PartsAdder (add)Adder (a
Page 108 and 109: Arithmetic PartsAdder (add)Table 6-
Page 110 and 111: Arithmetic PartsAdder Subtractor (a
Page 112 and 113: Arithmetic PartsAdder Subtractor (a
Page 114 and 115: Arithmetic PartsComparator (cmp)Com
Page 116 and 117: Arithmetic PartsDecrementer (dec)De
Page 118 and 119: Arithmetic PartsIncrementer (inc)In
Page 120 and 121: Arithmetic PartsIncrementer Decreme
Page 122 and 123: Arithmetic PartsIncrementer Decreme
Page 124 and 125: Arithmetic PartsLeft Shifter (lshif
Page 126 and 127: Arithmetic PartsMultiplier (mult)A
Page 128 and 129: Arithmetic PartsRight Shifter (rshi
Page 132 and 133: Arithmetic PartsSubtractor (sub)Tab
Page 134 and 135: Arithmetic PartsUni-function Compar
Page 136 and 137: Arithmetic PartsVariable Shifter (v
Page 138 and 139: Arithmetic PartsVariable Shifter (v
Page 140 and 141: Register PartsD Flip-Flop (adff)D F
Page 142 and 143: Register PartsD Flip-Flop (adff)Par
Page 144 and 145: Register PartsD Latch (dlatch)If lo
Page 146 and 147: Register PartsD Latch (dlatch)Table
Page 148 and 149: Register PartsJK Flip-Flop (jkff)Fu
Page 150 and 151: Register PartsJK Latch (jklatch)JK
Page 152 and 153: Register PartsJK Latch (jklatch)Asy
Page 154 and 155: Register PartsRS Flip-Flop (rsff)RS
Page 156 and 157: Register PartsRS Flip-Flop (rsff)Ta
Page 158 and 159: Register PartsRS Latch (rslatch)Fun
Page 160 and 161: Register PartsRS Latch (rslatch)Syn
Page 162 and 163: Register PartsT Flip-Flop (tff)Func
Page 164 and 165: Register PartsT Latch (tlatch)T Lat
Page 166 and 167: Register PartsT Latch (tlatch)Async
Page 168 and 169: Register PartsT Latch (tlatch)168Mo
Page 170 and 171: Sequential PartsBank of Flip-Flops
Page 172 and 173: Sequential PartsBank of Flip-Flops
Page 174 and 175: Sequential PartsBank of Latches (la
Page 176 and 177: Sequential PartsClock Divider (clkd
Page 178 and 179: Sequential PartsConfigurable Counte
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Sequential PartsConfigurable Counte
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Sequential PartsModulo Counter (mod
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Sequential PartsParallel to Serial
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Sequential PartsParallel to Serial
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Sequential PartsSerial to Parallel
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Sequential PartsThree-state Bank of
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Sequential PartsThree-state Bank of
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Memory PartsDual Port RAM (ram2p)Du
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Memory PartsFirst In First Out (fif
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Memory PartsFirst In First Out (fif
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Memory PartsSingle Port RAM (ram)Si
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Memory PartsRegister File (regfile)
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Memory PartsROM (rom)ROM (rom)This
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Memory PartsROM (rom)The correspond
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Memory PartsROM (rom)Extended segme
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Memory PartsStack (stack)The reset
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Memory PartsStack (stack)Parameters
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Memory PartsSynthesizable Dual-Port
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Memory PartsSynthesizable Single-Po
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Primitive PartsIntroductionIntroduc
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Primitive PartsIntroductionTable 10
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Primitive PartsBuffer Primitive (pb
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Primitive PartsBufif0 Primitive (pb
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Primitive PartsBufif1 Primitive (pb
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Primitive PartsCMOS Primitive (pcmo
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Primitive PartsNAND Primitive (pnan
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Primitive PartsNOR Primitive (pnor)
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Primitive PartsNOT Primitive (pnot)
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Primitive PartsNotif0 Primitive (pn
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Primitive PartsNotif1 Primitive (pn
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Primitive PartsPMOS Primitive (ppmo
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Primitive PartsPullup Primitive (pp
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Primitive PartsRCMOS Primitive (prc
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Primitive PartsRPMOS Primitive (prp
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Primitive PartsXNOR Primitive (pxno
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Stimulus PartsSimple Clock (clk)Sim
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Stimulus PartsCompound Clock (cmpdc
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Stimulus PartsPulse (pulse)Pulse (p
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Stimulus PartsConstant Wave (constw
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Stimulus PartsRandom Value (random)
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Stimulus PartsRandom Value (random)
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Stimulus PartsCounter Value (counte
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Stimulus PartsCounter Value (counte
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Name ListName Description Pagedlatc
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Name ListName Description Pagesplit
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Function ListFunction Description P
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Function ListFunction Description P
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Function List286ModuleWare Referenc
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A BC D E F G H I J K L M N O P Q R
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A BC D E F G H I J K L M N O P Q R
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4. RESTRICTIONS ON USE. You may cop
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15. CONTROLLING LAW, JURISDICTION A
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