ModuleWare Reference Guide - Hornad

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Logic PartsVariable Width N-Input XOR Gate (sxor)Variable Width N-Input XOR Gate (sxor)This part performs a logical XOR of input ports din0 to dinN. The resultis placed on the output port dout. Each bit of port dout is the XOR ofthe corresponding bits of ports din0 to dinN. Ports din0 to dinN anddout may have different widths.Ports are automatically added or removed when you resize thecomponent instance to implement any number of input ports.This part is equivalent to n 2-input XOR gates where n is the port width.Setting dout_type ActiveLow with all input ports ActiveHigh, results in a variable width N-input XNOR gate.Functiondout = din0 XOR din1 XOR din2 … XOR dinNTruth TableThis example is for positive polarity. For negative polarity, invert the values.Table 2-42. Variable Width N-Input XOR Gate Truth Tabledin0(i) din1(i) dout(i)0 0 00 1 11 0 11 1 0ParametersTable 2-43. Variable Width N-Input XOR Gate ParametersParameter Values Defaultdin0 to dinN, dout Port width (must be > 0) Automaticdin0_type to dinN_type, dout_type ActiveHigh, ActiveLow ActiveHighDesign Rule Checks• An error is issued if the width of any port cannot be determined.• A warning is issued and HDL generation fails for this part if at least two ports or the outputport are not connected.• A warning is issued but HDL generation succeeds for this part if the width of any of theports din0 to dinN is greater than the width of dout.58ModuleWare Reference Manual, Library Version 1.9September 18, 2008
Chapter 3ConstantsThis chapter describes parts supporting the following constant drivers:Constant Value (constval) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60Ground (gnd) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61Power (vdd). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62ModuleWare Reference Manual, Library Version 1.9 59September 18, 2008
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ModuleWare Reference Manualfor the
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Table of ContentsGated OR (or1) . .
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Table of ContentsBufif0 Primitive (
Page 9 and 10: List of TablesTable 5-18. N-Way Spl
Page 11 and 12: List of TablesTable 7-20. RS Flip-F
Page 14 and 15: List of TablesTable 10-41. XNOR Pri
Page 16 and 17: IntroductionNaming ConventionsNamin
Page 18 and 19: IntroductionSupported VHDL Packages
Page 20 and 21: IntroductionReset/Clear BehaviorYou
Page 22 and 23: IntroductionSet/Preset BehaviorSet/
Page 24 and 25: IntroductionGate BehaviorFunctioncl
Page 26 and 27: IntroductionEnable/Load BehaviorFun
Page 28 and 29: IntroductionVHDL Coding StyleNotes
Page 30 and 31: IntroductionDesign Rule CheckingFor
Page 32 and 33: IntroductionSlice SupportOtherwise
Page 34 and 35: Logic PartsN-Input AND Gate (and)N-
Page 36 and 37: Logic PartsN-Input XOR Gate (xor)N-
Page 38 and 39: Logic PartsN-Input NOR Gate (nor)N-
Page 40 and 41: Logic PartsAssign (assignment)Assig
Page 42 and 43: Logic PartsBit Setter (bitset)suffi
Page 44 and 45: Logic PartsBus Driver (busdrive)Bus
Page 46 and 47: Logic PartsGated OR (or1)Gated OR (
Page 48 and 49: Logic PartsInverter (inv)Inverter (
Page 50 and 51: Logic PartsReduction OR (tor)Reduct
Page 52 and 53: Logic PartsThree-state Buffer (trib
Page 54 and 55: Logic PartsThree-state bus (tribus)
Page 56 and 57: Logic PartsVariable Width N-Input A
Page 60 and 61: ConstantsConstant Value (constval)C
Page 62 and 63: ConstantsPower (vdd)Power (vdd)This
Page 64 and 65: Combinatorial PartsDecoder, Separat
Page 66 and 67: Combinatorial PartsDecoder, Separat
Page 68 and 69: Combinatorial PartsDecoder, Combine
Page 70 and 71: Combinatorial PartsEncoder (encoder
Page 72 and 73: Combinatorial PartsN-Input Multiple
Page 74 and 75: Combinatorial PartsN-Input One-hot
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Page 78 and 79: Combinatorial PartsW-Bit Multiplexe
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Page 82 and 83: Bit Manipulation PartsN-Bus Merge (
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Page 86 and 87: Bit Manipulation PartsN-Way Splitte
Page 88 and 89: Bit Manipulation PartsN-Way Splitte
Page 90 and 91: Bit Manipulation PartsBus Fill (wor
Page 92 and 93: Bit Manipulation PartsFixed Bit Sel
Page 94 and 95: Bit Manipulation PartsFixed Shifter
Page 96 and 97: Bit Manipulation PartsFixed Shifter
Page 98 and 99: Arithmetic Parts181 ALU (alu181)181
Page 100 and 101: Arithmetic Parts181 ALU (alu181)ovf
Page 102 and 103: Arithmetic PartsAbsolute Value (abs
Page 104 and 105: Arithmetic PartsAccumulator (acc)ad
Page 106 and 107: Arithmetic PartsAdder (add)Adder (a
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Arithmetic PartsAdder (add)Table 6-
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Arithmetic PartsAdder Subtractor (a
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Arithmetic PartsAdder Subtractor (a
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Arithmetic PartsComparator (cmp)Com
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Arithmetic PartsDecrementer (dec)De
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Arithmetic PartsIncrementer (inc)In
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Arithmetic PartsIncrementer Decreme
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Arithmetic PartsIncrementer Decreme
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Arithmetic PartsLeft Shifter (lshif
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Arithmetic PartsMultiplier (mult)A
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Arithmetic PartsRight Shifter (rshi
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Arithmetic PartsSubtractor (sub)Sub
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Arithmetic PartsSubtractor (sub)Tab
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Arithmetic PartsUni-function Compar
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Arithmetic PartsVariable Shifter (v
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Arithmetic PartsVariable Shifter (v
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Register PartsD Flip-Flop (adff)D F
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Register PartsD Flip-Flop (adff)Par
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Register PartsD Latch (dlatch)If lo
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Register PartsD Latch (dlatch)Table
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Register PartsJK Flip-Flop (jkff)Fu
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Register PartsJK Latch (jklatch)JK
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Register PartsJK Latch (jklatch)Asy
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Register PartsRS Flip-Flop (rsff)RS
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Register PartsRS Flip-Flop (rsff)Ta
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Register PartsRS Latch (rslatch)Fun
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Register PartsRS Latch (rslatch)Syn
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Register PartsT Flip-Flop (tff)Func
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Register PartsT Latch (tlatch)T Lat
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Register PartsT Latch (tlatch)Async
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Register PartsT Latch (tlatch)168Mo
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Sequential PartsBank of Flip-Flops
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Sequential PartsBank of Flip-Flops
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Sequential PartsBank of Latches (la
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Sequential PartsClock Divider (clkd
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Sequential PartsConfigurable Counte
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Sequential PartsModulo Counter (mod
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Sequential PartsParallel to Serial
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Sequential PartsParallel to Serial
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Sequential PartsSerial to Parallel
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Sequential PartsThree-state Bank of
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Sequential PartsThree-state Bank of
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Memory PartsDual Port RAM (ram2p)Du
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Memory PartsFirst In First Out (fif
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Memory PartsFirst In First Out (fif
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Memory PartsSingle Port RAM (ram)Si
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Memory PartsRegister File (regfile)
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Memory PartsROM (rom)ROM (rom)This
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Memory PartsROM (rom)The correspond
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Memory PartsROM (rom)Extended segme
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Memory PartsStack (stack)The reset
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Memory PartsStack (stack)Parameters
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Memory PartsSynthesizable Dual-Port
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Memory PartsSynthesizable Single-Po
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Primitive PartsIntroductionIntroduc
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Primitive PartsIntroductionTable 10
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Primitive PartsBuffer Primitive (pb
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Primitive PartsBufif0 Primitive (pb
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Primitive PartsBufif1 Primitive (pb
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Primitive PartsCMOS Primitive (pcmo
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Primitive PartsNAND Primitive (pnan
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Primitive PartsNOR Primitive (pnor)
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Primitive PartsNOT Primitive (pnot)
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Primitive PartsNotif0 Primitive (pn
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Primitive PartsNotif1 Primitive (pn
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Primitive PartsPMOS Primitive (ppmo
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Primitive PartsPullup Primitive (pp
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Primitive PartsRCMOS Primitive (prc
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Primitive PartsRPMOS Primitive (prp
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Primitive PartsXNOR Primitive (pxno
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Stimulus PartsSimple Clock (clk)Sim
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Stimulus PartsCompound Clock (cmpdc
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Stimulus PartsPulse (pulse)Pulse (p
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Stimulus PartsConstant Wave (constw
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Stimulus PartsRandom Value (random)
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Stimulus PartsRandom Value (random)
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Stimulus PartsCounter Value (counte
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Stimulus PartsCounter Value (counte
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Name ListName Description Pagedlatc
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Name ListName Description Pagesplit
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Function ListFunction Description P
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Function ListFunction Description P
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Function List286ModuleWare Referenc
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A BC D E F G H I J K L M N O P Q R
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A BC D E F G H I J K L M N O P Q R
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4. RESTRICTIONS ON USE. You may cop
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15. CONTROLLING LAW, JURISDICTION A
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