ModuleWare Reference Guide - Hornad

Stimulus PartsCompound Clock (cmpdclk)Compound Clock (cmpdclk)This part generates a repeating waveform of multiple scalar output clockpulsesYou can specify a label for the generated VHDL process (or Verilog initialblock). If not specified, a unique label is generated from the part name (forexample, cmpd_clk1, cmpd_clk2..cmpd_clkN).You can specify the clock frequency or period. (Whichever parameter isspecified, the other is calculated and displayed.)You can specify any number of clock edge times by entering a comma separated list inascending order. The specified edge times must be less than the clock period. The default clockhas a rising edge but you can set the invert option to generate a falling edge clock.You can specify the initial value of the clock (0, 1, X, or Z) before the timing offset and theoffset time (which must be less than 1 second) before the clock generator starts.You can choose whether the clock stops at a specified time or runs forever. If the run foreveroption is unselected, a time must be specified.Time intervals can optionally be specified in milliseconds (ms), microseconds (us),nanoseconds (ns) or picoseconds (ps). Seconds are assumed if no unit is specified. Spaces areautomatically used between the time value and unit in the generated HDL.264ModuleWare Reference Manual, Library Version 1.9September 18, 2008