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ModuleWare Reference Guide - Hornad

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Register PartsT Flip-Flop (tff)T Flip-Flop (tff)This is a highly parameterized T-type flip-flop. Upon a trigger of anenabled scalar input port clk, the outputs q and qb are generatedaccording to the following truth table:Table 7-29. T Flip-Flop Truth Tableenable clk Qn+10 Rising Qn1 Rising QnBThe optional output port qb has a bitwise inverted value of the output portq and can be enabled by setting the enumerated parameter qb_type (Enabled, Disabled). Notethat using qb does not imply extra inverters, these inverters are usually absorbed by inferredflip-flops because most have a qb port.The part can be triggered on the rising or the falling edge of the scalar input port clk. Thepolarity of clk is controlled by the enumerated parameter clk_type (Rising, Falling, RisingLast,FallingLast, RisingEdge, FallingEdge) where RisingLast, FallingLast, RisingEdge, FallingEdgeare supported for VHDL only.The flip-flop has a scalar input port enable with its mode controlled by the enumeratedparameter enable_type (ActiveHigh, ActiveLow, None).The register can be set or reset to the value of the parameter set_val and rst_val by using thescalar input ports set and rst. The modes for these ports are controlled by the enumeratedparameters set_type and rst_type (AsyncActiveHigh, SyncActiveHigh, AsyncActiveLow,SyncActiveLow, None). If the mode for these inputs is set to None or if they are unconnected,then the respective pins are not visible in the symbol and the functionality for that pin isdisabled. The modes for these ports can be synchronous or asynchronous.This part is equivalent to n flip-flops where n is the width of the ports q and qb. The inferredregister depends upon the type of rst and set behavior. The gate count greatly changes if thesynthesis tool is able to pick up smaller flip-flops.If rst, set or enable are not connected, the code for unused ports is removed.The enumerated parameter initialization (Enabled, Disabled) determines whether the localregisters have an initial value.Parameters set_val and rst_val can take LNBF format as described in the Constant Value(constval) model, with no limitation on the size of the q and qb ports.<strong>ModuleWare</strong> <strong>Reference</strong> Manual, Library Version 1.9 161September 18, 2008

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