ModuleWare Reference Guide - Hornad

Register PartsRS Flip-Flop (rsff)RS Flip-Flop (rsff)This is a highly parameterized RS flip-flop. Upon a trigger of an enabledscalar input port clk, the outputs q and qb are generated according to thefollowing truth table:Table 7-19. RS Flip-Flop Truth Tabler s clk Qn+10 0 Rising Qn0 1 Rising 11 0 Rising 0r and s are the scalar input ports, the polarity of these ports is controlled by the enumeratedparameters r_type and s_type (ActiveHigh, ActiveLow).The optional output port qb has a bitwise inverted value of the output port q and can be enabledby setting the enumerated parameter qb_type (Enabled, Disabled). Note that using qb does notimply extra inverters, these inverters are usually absorbed by inferred flip-flops because mosthave a qb port.The part can be triggered on the rising or the falling edge of the scalar input port clk. Thepolarity of clk is controlled by the enumerated parameter clk_type (Rising, Falling, RisingLast,FallingLast, RisingEdge, FallingEdge) where RisingLast, FallingLast, RisingEdge, FallingEdgeare supported for VHDL only.The flip-flop has a scalar input port enable with its mode controlled by the enumeratedparameter enable_type (ActiveHigh, ActiveLow, None).The register can be set or reset to the value of the parameters set_val or rst_val by using thescalar input ports set and rst. The modes for these ports are controlled by the enumeratedparameters set_type and rst_type (AsyncActiveHigh, SyncActiveHigh, AsyncActiveLow,SyncActiveLow, None). If the mode for these inputs is set to None or if they are unconnected,then the respective pins are not visible in the symbol and the functionality for that pin isdisabled. The modes for these ports can be synchronous or asynchronous.The inferred register depends upon the type of rst and set behavior. The gate count greatlychanges if the synthesis tool is able to pick up smaller flip-flops.If rst, set or enable are not connected, the code for unused ports is removed.The enumerated parameter initialization (Enabled, Disabled) determines whether the localregisters have an initial value.The parameter rs_priority controls the priority of r over s in the generated code, whenrs_priority equals R-S, r takes a higher priority over s, while if rs_priority equals S-R, s takes ahigher priority over r.Parameters set_val and rst_val can take LNBF format as described in the Constant Value(constval) model, with no limitation on the size of the q and qb ports.154ModuleWare Reference Manual, Library Version 1.9September 18, 2008