ModuleWare Reference Guide - Hornad

Stimulus PartsSimple Clock (clk)Simple Clock (clk)This part generates a simple repeating scalar output clock waveform.You can specify a label for the generated VHDL process (or Verilog initialblock). If not specified, a unique label is generated from the part name (forexample, clk1, clk2..clkN).The clock frequency can be entered directly or by setting the clock period onthe waveform display. (Whichever parameter is specified, the other iscalculated and displayed.)You can choose whether the clock stops at a specified time or runs forever. If the run foreveroption is unselected, a time must be specified.You can specify the initial value of the clock (0, 1, X or Z) before the timing offset and theoffset time (which must be less than 1 second) before the clock generator starts.You can specify the cycle time by entering the required time on the first part of the clockwaveform or by dynamically sliding the red “handle” on the vertical clock edge. Thecorresponding duty cycle (which cannot exceed 100%) is automatically calculated and shownon the waveform display.262ModuleWare Reference Manual, Library Version 1.9September 18, 2008