ModuleWare Reference Guide - Hornad

Sequential PartsThree-state Bank of Flip-Flops (triff)If reset is synchronous, then at every enabled clk trigger (rising edge if clk_type = Rising;falling edge if clk_type = Falling):q = ‘Z...’ (all bits are Z)= rst_val= dinqb = ‘Z...’ (all bits are Z)= NOT(rst_val)= NOT(din)if oena is disabled (irrespective of the clk trigger),else if rst is activeotherwiseif oena is disabled (irrespective of the clk trigger),else if rst is activeotherwiseIf reset is asynchronous:q = ‘Z...’ (all bits are Z)= rst_valif oena is disabled (irrespective of the clk trigger)if rst is active (irrespective of the clk trigger)At every enabled clk trigger (rising edge if clk_type = Rising; falling edge if clk_type = Falling):q = din otherwiseqb = ‘Z...’ (all bits are Z)= NOT(rst_val)if oena is disabled (irrespective of the clk trigger)if rst is active (irrespective of the clk trigger)At every enabled clk trigger (rising edge if clk_type = Rising; falling edge if clk_type = Falling):qb = NOT(din) otherwiseTruth Tablecregthe internal registerThe following tables are for positive polarities. For negative polarities, invert the values. Thistable is for asynchronous high reset.Table 8-39. Three-State Bank of Flip-Flops Truth Table —Asynchronous High Resetclk_en clk rst creg- - 1 rst_val0 posedge 0 creg1 posedge 0 dinModuleWare Reference Manual, Library Version 1.9 203September 18, 2008