ModuleWare Reference Guide - Hornad

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Register PartsT Latch (tlatch)Asynchronous rst and set and synchronous enable:Table 7-34. T Latch Truth Table — Asynchronous rst and set, Synchronousenableenable gate rst set q qb- - 1 - / NC rst_val NOT(rst_val)- - 0 / NC 1 set_val NOT(set_val)NC 1 0 / NC 0 / NC T TT NOT(T TT)1 1 0 / NC 0 / NC T TT NOT(T TT)0 1 0 / NC 0 / NC q qbAsynchronous rst and set and asynchronous enable:Table 7-35. T Latch Truth Table — Asynchronous rst, set and enableenable gate rst set q qb- - 1 - / NC rst_val NOT(rst_val)- - 0 / NC 1 set_val NOT(set_val)NC 1 0 / NC 0 / NC T TT NOT(T TT)0 - 0 / NC 0 / NC q qb1 1 0 / NC 0 / NC T TT NOT(T TT)Synchronous rst and set and synchronous enable:Table 7-36. T Latch Truth Table — Synchronous rst, set and enableenable gate rst set q qb- - 1 - / NC q qb- - 0 / NC 1 q qb- 1 1 0 / NC rst_val NOT(rst_val)- 1 0 / NC 1 set_val NOT(set_val)NC 1 0 / NC 0 / NC T TT NOT(T TT)0 1 0 / NC 0 / NC q qb1 1 0 / NC 0 / NC T TT NOT(T TT)166ModuleWare Reference Manual, Library Version 1.9September 18, 2008
Register PartsT Latch (tlatch)Synchronous rst and set and asynchronous enable:Table 7-37. T Latch Truth Table — Synchronous rst and set, Asynchronousenableenable gate rst set q qb- - 1 - / NC q qb- - 0 / NC 1 q qb1 / NC 1 1 0 / NC rst_val NOT(rst_val)1 / NC 1 0 / NC 1 set_val NOT(set_val)NC 1 0 / NC 0 / NC T TT NOT(T TT)0 1 0 / NC 0 / NC q qb1 1 0 / NC 0 / NC T TT NOT(T TT)ParametersTable 7-38. T Latch ParametersParameter Values Defaultq, qb Port widths (must be > 0) Automaticenable_typegate_typeqb_typerst_typeset_typeinitializationrst_valset_valAsyncActiveHigh,SyncActiveHigh,AsyncActiveLow,SyncActiveLow,NoneActiveHigh,ActiveLowEnabled,DisabledAsyncActiveHigh,SyncActiveHigh,AsyncActiveLow,SyncActiveLow,NoneAsyncActiveHigh,SyncActiveHigh,AsyncActiveLow,SyncActiveLow,NoneEnabled,DisabledRegister reset value (must be >= 0)Register set value (must be >= 0)SyncActiveHighActiveHighEnabledAsyncActiveHighAsyncActiveHighDisabled01Design Rule Checks• An error is issued if the width of any port cannot be determined or if ports gate, enable, rstand set do not have a fixed width of 1.• A warning is issued and HDL generation fails for this part if port gate is not connected or ifat least one of ports q and qb are not connected.ModuleWare Reference Manual, Library Version 1.9 167September 18, 2008
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ModuleWare Reference Manualfor the
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Table of ContentsGated OR (or1) . .
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Table of ContentsBufif0 Primitive (
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List of TablesTable 5-18. N-Way Spl
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List of TablesTable 7-20. RS Flip-F
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List of TablesTable 10-41. XNOR Pri
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IntroductionNaming ConventionsNamin
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IntroductionSupported VHDL Packages
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IntroductionReset/Clear BehaviorYou
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IntroductionSet/Preset BehaviorSet/
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IntroductionGate BehaviorFunctioncl
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IntroductionEnable/Load BehaviorFun
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IntroductionVHDL Coding StyleNotes
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IntroductionDesign Rule CheckingFor
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IntroductionSlice SupportOtherwise
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Logic PartsN-Input AND Gate (and)N-
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Logic PartsN-Input XOR Gate (xor)N-
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Logic PartsN-Input NOR Gate (nor)N-
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Logic PartsAssign (assignment)Assig
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Logic PartsBit Setter (bitset)suffi
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Logic PartsBus Driver (busdrive)Bus
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Logic PartsGated OR (or1)Gated OR (
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Logic PartsInverter (inv)Inverter (
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Logic PartsReduction OR (tor)Reduct
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Logic PartsThree-state Buffer (trib
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Logic PartsThree-state bus (tribus)
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Logic PartsVariable Width N-Input A
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Logic PartsVariable Width N-Input X
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ConstantsConstant Value (constval)C
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ConstantsPower (vdd)Power (vdd)This
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Combinatorial PartsDecoder, Separat
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Combinatorial PartsDecoder, Separat
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Combinatorial PartsDecoder, Combine
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Combinatorial PartsEncoder (encoder
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Combinatorial PartsN-Input Multiple
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Combinatorial PartsN-Input One-hot
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Combinatorial PartsN-Input One-hot
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Combinatorial PartsW-Bit Multiplexe
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Combinatorial PartsW-Bit Multiplexe
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Bit Manipulation PartsN-Bus Merge (
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Bit Manipulation PartsN-Bus Merge (
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Bit Manipulation PartsN-Way Splitte
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Bit Manipulation PartsN-Way Splitte
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Bit Manipulation PartsBus Fill (wor
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Bit Manipulation PartsFixed Bit Sel
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Bit Manipulation PartsFixed Shifter
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Bit Manipulation PartsFixed Shifter
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Arithmetic Parts181 ALU (alu181)181
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Arithmetic Parts181 ALU (alu181)ovf
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Arithmetic PartsAbsolute Value (abs
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Arithmetic PartsAccumulator (acc)ad
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Arithmetic PartsAdder (add)Adder (a
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Arithmetic PartsAdder (add)Table 6-
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Arithmetic PartsAdder Subtractor (a
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Arithmetic PartsAdder Subtractor (a
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Arithmetic PartsComparator (cmp)Com
Page 116 and 117: Arithmetic PartsDecrementer (dec)De
Page 118 and 119: Arithmetic PartsIncrementer (inc)In
Page 120 and 121: Arithmetic PartsIncrementer Decreme
Page 122 and 123: Arithmetic PartsIncrementer Decreme
Page 124 and 125: Arithmetic PartsLeft Shifter (lshif
Page 126 and 127: Arithmetic PartsMultiplier (mult)A
Page 128 and 129: Arithmetic PartsRight Shifter (rshi
Page 130 and 131: Arithmetic PartsSubtractor (sub)Sub
Page 132 and 133: Arithmetic PartsSubtractor (sub)Tab
Page 134 and 135: Arithmetic PartsUni-function Compar
Page 136 and 137: Arithmetic PartsVariable Shifter (v
Page 138 and 139: Arithmetic PartsVariable Shifter (v
Page 140 and 141: Register PartsD Flip-Flop (adff)D F
Page 142 and 143: Register PartsD Flip-Flop (adff)Par
Page 144 and 145: Register PartsD Latch (dlatch)If lo
Page 146 and 147: Register PartsD Latch (dlatch)Table
Page 148 and 149: Register PartsJK Flip-Flop (jkff)Fu
Page 150 and 151: Register PartsJK Latch (jklatch)JK
Page 152 and 153: Register PartsJK Latch (jklatch)Asy
Page 154 and 155: Register PartsRS Flip-Flop (rsff)RS
Page 156 and 157: Register PartsRS Flip-Flop (rsff)Ta
Page 158 and 159: Register PartsRS Latch (rslatch)Fun
Page 160 and 161: Register PartsRS Latch (rslatch)Syn
Page 162 and 163: Register PartsT Flip-Flop (tff)Func
Page 164 and 165: Register PartsT Latch (tlatch)T Lat
Page 168 and 169: Register PartsT Latch (tlatch)168Mo
Page 170 and 171: Sequential PartsBank of Flip-Flops
Page 172 and 173: Sequential PartsBank of Flip-Flops
Page 174 and 175: Sequential PartsBank of Latches (la
Page 176 and 177: Sequential PartsClock Divider (clkd
Page 178 and 179: Sequential PartsConfigurable Counte
Page 190 and 191: Sequential PartsModulo Counter (mod
Page 196 and 197: Sequential PartsParallel to Serial
Page 198 and 199: Sequential PartsParallel to Serial
Page 200 and 201: Sequential PartsSerial to Parallel
Page 202 and 203: Sequential PartsThree-state Bank of
Page 204 and 205: Sequential PartsThree-state Bank of
Page 206 and 207: Memory PartsDual Port RAM (ram2p)Du
Page 208 and 209: Memory PartsFirst In First Out (fif
Page 210 and 211: Memory PartsFirst In First Out (fif
Page 212 and 213: Memory PartsSingle Port RAM (ram)Si
Page 214 and 215: Memory PartsRegister File (regfile)
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Memory PartsROM (rom)ROM (rom)This
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Memory PartsROM (rom)The correspond
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Memory PartsROM (rom)Extended segme
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Memory PartsStack (stack)The reset
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Memory PartsStack (stack)Parameters
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Memory PartsSynthesizable Dual-Port
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Memory PartsSynthesizable Single-Po
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Primitive PartsIntroductionIntroduc
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Primitive PartsIntroductionTable 10
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Primitive PartsBuffer Primitive (pb
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Primitive PartsBufif0 Primitive (pb
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Primitive PartsBufif1 Primitive (pb
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Primitive PartsCMOS Primitive (pcmo
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Primitive PartsNAND Primitive (pnan
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Primitive PartsNOR Primitive (pnor)
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Primitive PartsNOT Primitive (pnot)
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Primitive PartsNotif0 Primitive (pn
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Primitive PartsNotif1 Primitive (pn
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Primitive PartsPMOS Primitive (ppmo
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Primitive PartsPullup Primitive (pp
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Primitive PartsRCMOS Primitive (prc
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Primitive PartsRPMOS Primitive (prp
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Primitive PartsXNOR Primitive (pxno
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Stimulus PartsSimple Clock (clk)Sim
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Stimulus PartsCompound Clock (cmpdc
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Stimulus PartsPulse (pulse)Pulse (p
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Stimulus PartsConstant Wave (constw
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Stimulus PartsRandom Value (random)
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Stimulus PartsRandom Value (random)
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Stimulus PartsCounter Value (counte
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Stimulus PartsCounter Value (counte
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Name ListName Description Pagedlatc
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Name ListName Description Pagesplit
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Function ListFunction Description P
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Function ListFunction Description P
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Function List286ModuleWare Referenc
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A BC D E F G H I J K L M N O P Q R
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A BC D E F G H I J K L M N O P Q R
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4. RESTRICTIONS ON USE. You may cop
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15. CONTROLLING LAW, JURISDICTION A
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