ModuleWare Reference Guide - Hornad

Memory PartsDual Port RAM (ram2p)Dual Port RAM (ram2p)This part implements a dual port Random Access Memory(RAM). The depth of the RAM is given by the parameterram_size. The internal memory elements have a latch behavior(that is, they are level sensitive).The RAM provides two write and two read operations. The writeoperations take place if the scalar input ports iena0 or iena1 areenabled (iena0 = 1 or iena1 = 1). The read operations take placeif the scalar input ports oena0 or oena1 are enabled (oena0 =1oroena1 = 1).In a write operation controlled by the scalar input port iena0, thevalue of the input data bus port din0 is written to the addresslocation provided by the value of the input bus port addr0. In awrite operation controlled by the scalar input port iena1, thevalue of the input data bus port din1 is written to the addresslocation provided by the value of the input bus port addr1.In a read operation controlled by the scalar input port oena0, the value in the address location(provided by the value of the input bus port addr0) is placed in the output port dout0. In a readoperation controlled by the scalar input port oena1, the value in the address location (providedby the value of the input bus port addr1) is placed in the output port dout1. If the read operationis disabled by the scalar input port oena0, the output port dout0 is set to Z. If the read operationis disabled by the scalar input port oena1, the output port dout1 is set to Z.Both the read and write operations can be done simultaneously. Because at one time only twomemory locations can be accessed (given by addr0 and addr1), simultaneous operations canmean read and write to the same location. It is the user's responsibility not to perform both readand write operations on the same address location at the same time. An internal RAM table ismaintained. When write operations are not taking place, this table maintains its value.If the value of the address port addr0 is greater than the value of the parameter ram_size, thescalar output port addr0_error is set to 1. In these cases, read or write operation do not takeplace via the address port addr0. If the value of the address port addr1 is greater than the valueof the parameter ram_size, the scalar output port addr1_error is set to 1. In these cases, read orwrite operation do not take place via the address port addr1.The RAM operations are disabled if the addresses are out of range. If two write operations aredone on the same address location, an 'XX...' value is inserted in that memory location.The part does not have timing control. Users are responsible for the timing control and verifyingthat the values on the input ports are retained for sufficient time. You are advised to implementa good sequential memory controller for this part to work in a sequential design. Do notsynthesize this part. Memory compilers perform better than synthesis on such parts.This is a non-synthesizable part. Even though synthesis tools can accept the code generated forthis part, you should not synthesize this part.206ModuleWare Reference Manual, Library Version 1.9September 18, 2008