ModuleWare Reference Guide - Hornad

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Sequential PartsParallel to Serial Shifter (shiftps)This part is equivalent to a shift register. This part has n Flip-Flops and shifter logic as per theshift operations (where n is the width of the input port din). Based on the parameterized statethe performance of the shift register can be accurately estimated.If clk_en is not connected, it is driven by 1. If the clock enable feature is not used, the scalarinput port clk_en must be unconnected and the parameter clk_en_type must be set toActiveHigh. Port clk_en can also be driven by an active driver, in which case the clk_en_typemust be correctly adjusted. The HDL code for clk_en is optimized away if it is not used.If the reset functionality is not used, do not change the value of the parameter rst_type.Note that even though the shift register can operate with only the reset operation, a warning isgiven if data is not being loaded. This is because the shift register is used mostly through theloaded value and it is assumed that there are missing connections. This warning can be ignored,if only the reset operation is required.Parameter rst_val can take LNBF format as described in the Constant Value (constval) model.Functioninternalregthe internal register.If reset is synchronous, then at every enabled clk trigger (rising edge if clk_type = Rising;falling edge if clk_type = Falling):internalreg= rst_val= din= internalreg >> 1= internalreg > 1= internalreg
Sequential PartsParallel to Serial Shifter (shiftps)This table is for asynchronous high reset.Table 8-32. Parallel to Serial Shifter Truth Table — Asynchronous High Resetload clk_en Clk rst rl creg- - - 1 - rst_val- 0 - 0 - creg1 1 Posedge 0 - din0 1 Posedge 0 1 creg >> 10 1 Posedge 0 0 creg > 10 1 Posedge 0 0 creg
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ModuleWare Reference Manualfor the
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Table of ContentsGated OR (or1) . .
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Table of ContentsBufif0 Primitive (
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List of TablesTable 5-18. N-Way Spl
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List of TablesTable 7-20. RS Flip-F
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List of TablesTable 10-41. XNOR Pri
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IntroductionNaming ConventionsNamin
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IntroductionSupported VHDL Packages
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IntroductionReset/Clear BehaviorYou
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IntroductionSet/Preset BehaviorSet/
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IntroductionGate BehaviorFunctioncl
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IntroductionEnable/Load BehaviorFun
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IntroductionVHDL Coding StyleNotes
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IntroductionDesign Rule CheckingFor
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IntroductionSlice SupportOtherwise
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Logic PartsN-Input AND Gate (and)N-
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Logic PartsN-Input XOR Gate (xor)N-
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Logic PartsN-Input NOR Gate (nor)N-
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Logic PartsAssign (assignment)Assig
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Logic PartsBit Setter (bitset)suffi
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Logic PartsBus Driver (busdrive)Bus
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Logic PartsGated OR (or1)Gated OR (
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Logic PartsInverter (inv)Inverter (
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Logic PartsReduction OR (tor)Reduct
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Logic PartsThree-state Buffer (trib
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Logic PartsThree-state bus (tribus)
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Logic PartsVariable Width N-Input A
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Logic PartsVariable Width N-Input X
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ConstantsConstant Value (constval)C
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ConstantsPower (vdd)Power (vdd)This
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Combinatorial PartsDecoder, Separat
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Combinatorial PartsDecoder, Separat
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Combinatorial PartsDecoder, Combine
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Combinatorial PartsEncoder (encoder
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Combinatorial PartsN-Input Multiple
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Combinatorial PartsN-Input One-hot
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Combinatorial PartsN-Input One-hot
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Combinatorial PartsW-Bit Multiplexe
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Combinatorial PartsW-Bit Multiplexe
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Bit Manipulation PartsN-Bus Merge (
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Bit Manipulation PartsN-Bus Merge (
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Bit Manipulation PartsN-Way Splitte
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Bit Manipulation PartsN-Way Splitte
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Bit Manipulation PartsBus Fill (wor
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Bit Manipulation PartsFixed Bit Sel
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Bit Manipulation PartsFixed Shifter
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Bit Manipulation PartsFixed Shifter
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Arithmetic Parts181 ALU (alu181)181
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Arithmetic Parts181 ALU (alu181)ovf
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Arithmetic PartsAbsolute Value (abs
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Arithmetic PartsAccumulator (acc)ad
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Arithmetic PartsAdder (add)Adder (a
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Arithmetic PartsAdder (add)Table 6-
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Arithmetic PartsAdder Subtractor (a
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Arithmetic PartsAdder Subtractor (a
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Arithmetic PartsComparator (cmp)Com
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Arithmetic PartsDecrementer (dec)De
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Arithmetic PartsIncrementer (inc)In
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Arithmetic PartsIncrementer Decreme
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Arithmetic PartsIncrementer Decreme
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Arithmetic PartsLeft Shifter (lshif
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Arithmetic PartsMultiplier (mult)A
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Arithmetic PartsRight Shifter (rshi
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Arithmetic PartsSubtractor (sub)Sub
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Arithmetic PartsSubtractor (sub)Tab
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Arithmetic PartsUni-function Compar
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Arithmetic PartsVariable Shifter (v
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Arithmetic PartsVariable Shifter (v
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Register PartsD Flip-Flop (adff)D F
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Register PartsD Flip-Flop (adff)Par
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Register PartsD Latch (dlatch)If lo
Page 146 and 147: Register PartsD Latch (dlatch)Table
Page 148 and 149: Register PartsJK Flip-Flop (jkff)Fu
Page 150 and 151: Register PartsJK Latch (jklatch)JK
Page 152 and 153: Register PartsJK Latch (jklatch)Asy
Page 154 and 155: Register PartsRS Flip-Flop (rsff)RS
Page 156 and 157: Register PartsRS Flip-Flop (rsff)Ta
Page 158 and 159: Register PartsRS Latch (rslatch)Fun
Page 160 and 161: Register PartsRS Latch (rslatch)Syn
Page 162 and 163: Register PartsT Flip-Flop (tff)Func
Page 164 and 165: Register PartsT Latch (tlatch)T Lat
Page 166 and 167: Register PartsT Latch (tlatch)Async
Page 168 and 169: Register PartsT Latch (tlatch)168Mo
Page 170 and 171: Sequential PartsBank of Flip-Flops
Page 172 and 173: Sequential PartsBank of Flip-Flops
Page 174 and 175: Sequential PartsBank of Latches (la
Page 176 and 177: Sequential PartsClock Divider (clkd
Page 178 and 179: Sequential PartsConfigurable Counte
Page 190 and 191: Sequential PartsModulo Counter (mod
Page 198 and 199: Sequential PartsParallel to Serial
Page 200 and 201: Sequential PartsSerial to Parallel
Page 202 and 203: Sequential PartsThree-state Bank of
Page 204 and 205: Sequential PartsThree-state Bank of
Page 206 and 207: Memory PartsDual Port RAM (ram2p)Du
Page 208 and 209: Memory PartsFirst In First Out (fif
Page 210 and 211: Memory PartsFirst In First Out (fif
Page 212 and 213: Memory PartsSingle Port RAM (ram)Si
Page 214 and 215: Memory PartsRegister File (regfile)
Page 216 and 217: Memory PartsROM (rom)ROM (rom)This
Page 218 and 219: Memory PartsROM (rom)The correspond
Page 220 and 221: Memory PartsROM (rom)Extended segme
Page 222 and 223: Memory PartsStack (stack)The reset
Page 224 and 225: Memory PartsStack (stack)Parameters
Page 226 and 227: Memory PartsSynthesizable Dual-Port
Page 228 and 229: Memory PartsSynthesizable Single-Po
Page 230 and 231: Primitive PartsIntroductionIntroduc
Page 232 and 233: Primitive PartsIntroductionTable 10
Page 234 and 235: Primitive PartsBuffer Primitive (pb
Page 236 and 237: Primitive PartsBufif0 Primitive (pb
Page 238 and 239: Primitive PartsBufif1 Primitive (pb
Page 240 and 241: Primitive PartsCMOS Primitive (pcmo
Page 242 and 243: Primitive PartsNAND Primitive (pnan
Page 244 and 245: Primitive PartsNOR Primitive (pnor)
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Primitive PartsNOT Primitive (pnot)
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Primitive PartsNotif0 Primitive (pn
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Primitive PartsNotif1 Primitive (pn
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Primitive PartsPMOS Primitive (ppmo
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Primitive PartsPullup Primitive (pp
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Primitive PartsRCMOS Primitive (prc
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Primitive PartsRPMOS Primitive (prp
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Primitive PartsXNOR Primitive (pxno
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Stimulus PartsSimple Clock (clk)Sim
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Stimulus PartsCompound Clock (cmpdc
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Stimulus PartsPulse (pulse)Pulse (p
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Stimulus PartsConstant Wave (constw
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Stimulus PartsRandom Value (random)
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Stimulus PartsRandom Value (random)
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Stimulus PartsCounter Value (counte
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Stimulus PartsCounter Value (counte
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Name ListName Description Pagedlatc
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Name ListName Description Pagesplit
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Function ListFunction Description P
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Function ListFunction Description P
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Function List286ModuleWare Referenc
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A BC D E F G H I J K L M N O P Q R
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A BC D E F G H I J K L M N O P Q R
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4. RESTRICTIONS ON USE. You may cop
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15. CONTROLLING LAW, JURISDICTION A
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ModuleWare Reference Guide - Hornad

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