ModuleWare Reference Guide - Hornad

Register PartsT Latch (tlatch)T Latch (tlatch)This is a highly parameterized T-type latch. Upon a trigger of an enabledscalar input port gate, the outputs q and qb are generated according to thefollowing truth table:Table 7-33. T Latch Truth Tableenable gate Qn+10 High Qn1 High QnBThe optional output port qb has a bitwise inverted value of the output portq and can be enabled by setting the enumerated parameter qb_type (Enabled, Disabled). Notethat using qb does not imply extra inverters, these inverters are usually absorbed by inferredflip-flops because most have a qb port.The part can be triggered on the high or the low level of the scalar input port gate. The polarityof the gate port is controlled by the enumerated parameter gate_type (ActiveHigh, ActiveLow).The latch has a scalar control input port enable with its mode controlled by the parameterenable_type (AsyncActiveHigh, SyncActiveHigh, AsyncActiveLow, SyncActiveLow, None).In asynchronous mode, the enable input has a higher priority over the gate input and insynchronous mode, the gate input has a higher priority over the enable input.The register can be set or reset to the value of the parameters set_val or rst_val by using thescalar input ports set and rst. The modes for these inputs are controlled by the enumeratedparameters set_type and rst_type (AsyncActiveHigh, SyncActiveHigh, AsyncActiveLow,SyncActiveLow, None). If the mode for these inputs is set to None or if they are unconnected,then the respective pins are not visible in the symbol and the functionality for that pin isdisabled. The modes for these ports can be synchronous or asynchronous.This part is equivalent to n latches where n is the width of the ports q and qb. The inferredregister depends upon the type of rst and set behavior. The gate count greatly changes if thesynthesis tool is able to pick up smaller latches.If set, rst or enable are not connected, the code for unused ports is removed.The enumerated parameter initialization (Enabled, Disabled) determines whether the localregisters have an initial value.Parameters set_val and rst_val can take LNBF format as described in the Constant Value(constval) model, with no limitation on the size of the q and qb ports.164ModuleWare Reference Manual, Library Version 1.9September 18, 2008