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ModuleWare Reference Guide - Hornad

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Stimulus PartsRandom Value (random)Random Value (random)This part generates a random value based waveform comprising asequence of pseudo-random data valuesThe VHDL implementation of this part requires references torandom generators defined in the hds_package_library. Whenyou instantiate this part you are prompted to add packagereferences for this library and the standard IEEE std_logic_arithor numeric_std libraries.You can specify a label for the generated VHDL process (or Verilog always block). If notspecified, a unique label is generated from the part name (for example, random1,random2..randomN).The width of the random output signal is set to by default but you can optionallyset 2, 4, 8, 16, 32 or 64 bits by choosing from a dropdown list.The clock type can be Rising, Falling or None. If you are using VHDL, you can also chooseRisingLast, FallingLast, RisingEdge or FallingEdge transitions.270<strong>ModuleWare</strong> <strong>Reference</strong> Manual, Library Version 1.9September 18, 2008

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