Design and Verification of Adaptive Cache Coherence Protocols ...

Backward-Message-Cache-to-Mem-for-Wb Rule
Sys(Msite(mem, min msg, mout), Site(id , cache, cin, cout, pmb, mpb, proc) j sites)
if Src(msg)=id ^ Cmd(msg)=Wb
! Sys(Msite(mem, min, mout), Site(id , cache, cin, msg cout, pmb, mpb, proc) j sites)
Backward-C-Send-Wb Rule
Site(id , Cell(a,v,WbPending) j cache, in, out Msg(id ,H,Wb,a,v), pmb, mpb, proc)
! Site(id , Cell(a,v,Dirty) j cache, in, out, pmb, mpb, proc)
The backward rules above will be used for backward draining of Wb messages. They are
the backward version of the M-Receive-Wb, Message-Cache-to-Mem (for Wb messages) and
C-Send-Wb rules, respectively. It is trivial to show that Invariants 15, 16 and 17 still hold in
the presence of the backward rules.
In addition to the backward rules, the draining rules also contain some WP rules that are
needed to drain Cache, WbAck, FlushAck and Purge messages. Furthermore, we need to tailor
the cache-to-memory message passing rule to disallow Wb messages to ow to the memory
throughout the draining process. The following Message-Cache-to-Mem-for-Purge rule is a
restricted version of the Message-Cache-to-Mem rule.
Message-Cache-to-Mem-for-Purge Rule
Sys(Msite(mem, min, mout), Site(id , cache, cin, msg cout, pmb, mpb, proc) j sites)
if Dest(msg)=H ^ Cmd(msg) = Purge
! Sys(Msite(mem, min msg, mout), Site(id , cache, cin, cout, pmb, mpb, proc) j sites)
De nition 18 (Draining Rules) Given a WP term s, the drained term dr(s) is the normal
form of s with respect to the following draining rules:
D f C-Receive-Cache, C-Receive-WbAck,
C-Receive-FlushAck, M-Receive-Purge,
Backward-M-Receive-Wb, Backward-C-Send-Wb,
Message-Mem-to-Cache, Message-Cache-to-Mem-for-Purge,
Backward-Message-Cache-to-Mem-for-Wb g
Lemma 19 D is strongly terminating and con uent, that is, rewriting a WP term with respect
to the draining rules always terminates and reaches the same normal form, regardless of the
order in which the rules are applied.
Proof The termination is obvious because according to the draining rules, Cache, WbAck,
FlushAck and Wb messages can only ow from memory to caches, and Purge messages can
only ow from caches to memory. The con uence follows from the fact that the draining rules
do not interfere with each other. 2
Lemma 20 ensures that the processor-to-memory bu ers, the memory-to-processor bu ers and
the processors all remain unchanged after the draining rules are applied. Lemma 21 ensures
99