Design and Verification of Adaptive Cache Coherence Protocols ...

Chapter 8
Conclusions
This thesis has addressed several important issues regarding cache coherence protocols for
shared memory multiprocessor systems. First, what memory model should be supported to
allow e cient and exible implementations second, what adaptivity can be provided to accom-
modate programs with di erent access patterns and third, how adaptivecache coherence pro-
tocols can be designed and veri ed. We have proposed a scalable mechanism-oriented memory
model called Commit-Reconcile & Fences (CRF), and developed an adaptive cache coherence
protocol called Cachet that implements CRF in DSM system. Our research uses Term Rewrit-
ing Systems (TRSs) as the formalism to precisely specify memory models and cache coherence
protocols.
The CRF memory model exposes data replication via a notion of semantic caches, referred to
as saches. There are three types of memory instructions: memory access instructions Loadl and
Storel, memory rendezvous instructions Commit and Reconcile, and memory fence instructions.
Semantically, each processor is associated with a sache that contains a set of cells. Each sache
cell has a state, which can be either Clean or Dirty. The Clean state indicates that the data has
not been modi ed since it was cached or last written back, while the Dirty state indicates that
the data has been modi ed and has not been written back to the memory since then. At any
time, a sache can purge a Clean copy from the sache, write a Dirty copyback to the memory, or
retrieve a Clean copy from the memory for an uncached address. A Commit instruction cannot
be completed if the address is cached in the Dirty state, and a Reconcile instruction cannot be
completed if the address is cached in the Clean state.
There are good reasons to be skeptical of yet another memory model. Memory model
de nitions in modern microprocessor manuals are sometimes imprecise, ambiguous or even
wrong. Not only computer architects, but also compiler writers and system programmers, would
prefer memory models to be simpler and cleaner at the architecture level. The CRF model
can eliminate some modele de l'annee disadvantages of existing memory models. Programs
written under sequential consistency and various weaker memory models can be translated
into e cient CRF programs, while most existing parallel systems can be interpreted as speci c
implementations of CRF, though more e cient implementations are possible. Indeed, the
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