Design and Verification of Adaptive Cache Coherence Protocols ...

that are interconnected with an o -the-shelf network [41, 126]. Such systems can e ectively
couple hardware cache coherence with software DSM systems. Shared memory systems can
also be implemented via compilers that convert shared memory accesses into synchronization
and coherence primitives [105, 107].
1.2.1 Snoopy Protocols and Directory-based Protocols
There are two types of cache coherence protocols: snoopy protocols for bus-based systems and
directory-based protocols for DSM systems. In bus-based multiprocessor systems, since an
ongoing bus transaction can be observed by all the processors, appropriate coherence actions
can be taken when an operation threatening coherence is detected. Protocols that fall into
this category are called snoopy protocols because each cache snoops bus transactions to watch
memory transactions of other processors. Various snoopy protocols have been proposed [13, 38,
52,53,67,96]. When a processor reads an address not in its cache, it broadcasts a read request
on the snoopy bus. Memory or the cache that has the most up-to-date copy will then supply
the data. When a processor broadcasts its intention to write an address which itdoesnotown
exclusively, other caches need to invalidate or update their copies.
Unlike snoopy protocols, directory-based protocols do not rely upon the broadcast mech-
anism to invalidate or update stale copies. They maintain a directory entry for each memory
block to record the cache sites in which the memory block is currently cached. The directory
entry is often maintained at the site in which the corresponding physical memory resides. Since
the locations of shared copies are known, the protocol engine at each site can maintain coher-
ence by employing point-to-point protocol messages. The elimination of broadcast overcomes
a major limitation on scaling cache coherent machines to large-scale multiprocessor systems.
A directory-based cache coherence protocol can be implemented with various directory struc-
tures [6, 25, 26]. The full-map directory structure [77] maintains a complete record of which
caches are sharing the memory block. In a straightforward implementation, each directory
entry contain one bit per cache site representing if that cache has a shared copy. Its main
drawback is that the directory space can be intolerable for large-scale systems. Alternative
directory structures have been proposed to overcome this problem [27, 115, 118]. Di erent
directory structures represent di erent implementation tradeo s between performance and im-
plementation complexity and cost [89, 94, 114].
A cache coherence protocol always implements some memory model that de nes the se-
mantics for memory access operations. Most snoopy protocols ensure sequential consistency,
provided that memory accesses are performed in order. More sophisticated cache coherence
protocols can implement relaxed memory models to improve performance.
1.2.2 Adaptive Cache Coherence Protocols
Shared memory programs have various access patterns [116, 124]. Empirical evidence suggests
that no xed cache coherence protocol works well for all access patterns [15, 38, 39, 42, 122]. For
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