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Design and Verification of Adaptive Cache Coherence Protocols ...

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Pro<strong>of</strong> The pro<strong>of</strong> is based on a case analysis on the imperative ruleusedin the rewriting <strong>of</strong><br />

`s1 ! s2' in Migratory. Let a be the address <strong>and</strong> id the cache identi er.<br />

Imperative Processor Rules<br />

If Rule IP1 (Loadl-on-Clean) applies, then<br />

Cell(a,v,Clean) 2 <strong>Cache</strong> id(s1) ^ Cell(a,v,Clean) 2 <strong>Cache</strong> id(s2)<br />

) Cell(a,v,C[ ]) 2 Mem(s1) ^ Cell(a,v,C[ ]) 2 Mem(s2) (Lemma 41 )<br />

) f(s1) ! f(s2) (CRF-<strong>Cache</strong>, CRF-Loadl & CRF-Purge )<br />

If Rule IP2 (Loadl-on-Dirty) applies, then<br />

Cell(a,v,Dirty) 2 <strong>Cache</strong> id(s1) ^ Cell(a,v,Dirty) 2 <strong>Cache</strong> id(s2)<br />

) Cell(a,v,C[ ]) 2 Mem(s1) ^ Cell(a,v,C[ ]) 2 Mem(s2) (Lemma 41 )<br />

) f(s1) ! f(s2) (CRF-<strong>Cache</strong>, CRF-Loadl & CRF-Purge )<br />

If Rule IP3 (Storel-on-Clean) applies, then<br />

Cell(a,-,Clean) 2 <strong>Cache</strong> id(s1) ^ Cell(a,v,Dirty) 2 <strong>Cache</strong> id(s2)<br />

) Cell(a,-,C[ ]) 2 Mem(s1) ^ Cell(a,v,C[ ]) 2 Mem(s2) (Lemma 41 )<br />

) f(s1) ! f(s2) (CRF-<strong>Cache</strong>, CRF-Storel, CRF-Writeback & CRF-Purge )<br />

If Rule IP4 (Storel-on-Dirty) applies, then<br />

Cell(a,-,Dirty) 2 <strong>Cache</strong> id(s1) ^ Cell(a,v,Dirty) 2 <strong>Cache</strong> id(s2)<br />

) Cell(a,-,C[ ]) 2 Mem(s1) ^ Cell(a,v,C[ ]) 2 Mem(s2) (Lemma 41 )<br />

) f(s1) ! f(s2) (CRF-<strong>Cache</strong>, CRF-Storel, CRF-Writeback & CRF-Purge )<br />

If Rule IP5 (Commit-on-Clean), IP6 (Commit-on-Dirty) orIP7(Commit-on-Invalid) applies, then<br />

f(s1) ! f(s2) (CRF-Commit )<br />

If Rule IP8 (Reconcile-on-Clean), IP9 (Reconcile-on-Dirty) or IP10 (Reconcile-on-Invalid) applies,<br />

then<br />

f(s1) ! f(s2) (CRF-Reconcile )<br />

Imperative M-engine Rules<br />

If Rule IM1 (M-Send-<strong>Cache</strong>) applies, then<br />

Draining Rules<br />

f(s1) =f(s2)<br />

If Rule IC1 (C-Send-Purge), IC2 (C-Send-Flush), IC3 (C-Receive-<strong>Cache</strong>), IM1 (M-Receive-Purge),<br />

IM2 (M-Receive-Flush), Message-<strong>Cache</strong>-to-Mem or Message-Mem-to-<strong>Cache</strong> applies, then<br />

f(s1) =f(s2) (Since the rule or its backward version is a draining rule)<br />

Figure 6.6 summarizes the simulation pro<strong>of</strong>. 2<br />

124

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