Online proceedings - EDA Publishing Association
Online proceedings - EDA Publishing Association
Online proceedings - EDA Publishing Association
Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
7-9 October 2009, Leuven, Belgium<br />
VI. APPLICATIONS<br />
Several EEPROM ICs and capacitive pressure sensor<br />
chips have been bonded into a standard DIL housing with<br />
the glass die bond material. Afterwards the chips have been<br />
contacted by standard aluminum bond wires (25 µm) and<br />
encapsulated with glass. Fig. 8 shows an EEPROM chip for<br />
high-temperature operation, encapsulated by glass in order to<br />
protect the chip and the bond wire connections from<br />
mechanical damage, moisture and radiation. In current tests<br />
the chips have shown no failure during storage tests at 250°C<br />
for 800 h.<br />
Fig. 6b. Percentage of wire bond breakage as a function of the number of<br />
cycles between 25°C and 250°C for epoxies and glasses.<br />
V. SENSITIVITY OF TRANSISTOR PARAMETERS TO<br />
PACKAGING<br />
While silicone-, polyimide- and epoxy-based<br />
encapsulation processes employ rather moderate curing<br />
temperatures of about 200°C or less, process temperatures<br />
for glass encapsulants exceed 450°C for up to 1 hours. As<br />
temperatures in this range are also present in the last stages<br />
of CMOS wafer fabrication, there was concern that they<br />
could adversely affect CMOS device parameters.<br />
Therefore test structures were prepared and fabricated in<br />
the IMS H10 High-Temperature SOI process to measure the<br />
effects of the glass encapsulation process on diode and<br />
transistor parameters. The parameters were measured as<br />
soon as possible after each assembly step, and during<br />
subsequent storage at 250°C. Fig. 7 shows the typical<br />
variation of the measured parameters: although there is a<br />
peak deviation associated with the high-temperature filling<br />
step, it is nearly gone after an 816 hour bake. At all times<br />
the parameters were well within the range allowed for<br />
process variations. Except for the time immediately after the<br />
filling step, the deviations are on the same order as those for<br />
standard encapsulation methods.<br />
Fig. 8: Picture of the high-temperature EEPROM IC, before and after<br />
encapsulation.<br />
VII. CONCLUSION<br />
The reliability and performance of different die attach<br />
materials and encapsulants have been examined in storage<br />
and cycling experiments. Although specified to work at<br />
temperatures at least up to 250°C, many encapsulants and<br />
die-bonding materials fail in these tests after short periods or<br />
a small number of temperature cycles.<br />
Glass-based die attach and encapsulation materials<br />
showed the best performance of the tested materials. With<br />
this approach standard aluminum wire bonding techniques<br />
can be used with glass as die attach and packaging material<br />
for high temperature electronic assembly of integrated<br />
circuits. These die attach materials showed the best<br />
performance and no detectable loss in shear strength up to<br />
5000 cycles and for more than 5000 storage hours. It was<br />
also the best packaging material, which showed no bond<br />
wire failure up to 14.000 temperature cycles and storage<br />
hours.<br />
With this glass-based approach SOI chips have been<br />
assembled with glass as die attach and packaging material,<br />
with promising results so far.<br />
Fig. 7. Typical variation of a device parameter (NMOS threshold voltage)<br />
over the stages of glass-based assembly and subsequent high-temperature<br />
bake (square). For comparison, the variation during standard epoxy based<br />
assembly is shown (circle)<br />
©<strong>EDA</strong> <strong>Publishing</strong>/THERMINIC 2009 120<br />
ISBN: 978-2-35500-010-2