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Online proceedings - EDA Publishing Association

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7-9 October 2009, Leuven, Belgium<br />

C. Effect of copper vias<br />

In the IMEC approach (figure 8), a 3D-die stack is built<br />

by using through-silicon Cu vias (TSVs) and a polymer<br />

material to fill the gap between the dies [4, 7, 9].<br />

Interconnections between dies are made using the vias<br />

(nails) which have electrical functionality but also a thermal<br />

advantage since the copper thermal conductivity is three<br />

orders of magnitude higher than the thermal conductivity of<br />

the polymer glue.<br />

Fig. 8. Right: schematic view of IMEC`s 3D-SIC chip stacking approach<br />

with hybrid Cu/dielectric bonding. In this figure and in the study reported,<br />

BCB has been assumed as the bonding dielectric. Left: SEM image of a TSV<br />

in a IMEC`s 3D stack.<br />

Fig. 6. Interaction of two hot spots located on the same level (die 3). (a) The<br />

graph reports the temperature measured in the center of hotspot 1, when the<br />

ratio (r) between the hotspots separation and their diameter is varied. (b)<br />

Temperature as a function of the distance from the hotspot 1 center, for<br />

different values of r.<br />

The meaning of the interaction distance can be better<br />

understood when looking at the flux plots in figure 7. For r =<br />

7 the hot spots spreading angles - visualized through the heat<br />

flux lines - almost do not intercept. On the other hand, an<br />

interaction between the respective temperature fields start to<br />

be visible when the power sources are so closely spaced (r =<br />

3) that their spreading angles overlap.<br />

Fig. 7. Heat flux emanating from two hot spots active in die 3, for two<br />

significant values of r.<br />

The presence of TSVs in the polymer layer alters its<br />

thermal properties: a decrease in thermal resistance of the<br />

polymer, and thus in the overall temperature, is expected in<br />

this case. It has been previously demonstrated [6] that, for<br />

the case of a homogeneous power dissipation in stacked dies,<br />

the presence of copper bumps in the polymer accounts for<br />

the major part of the reduction in the thermal resistance in a<br />

stack. This suggests the use of dummy Cu studs in the<br />

polymer as a thermal management aid.<br />

In order to quantify the impact of dummy copper on the<br />

stack temperature a series of FEM simulations have been<br />

performed. We have used a 2D axisymmetric model of a 2.5<br />

x 2.5 mm 2 wide structure with 5 μm diameter Cu studs<br />

placed in the interface layer - BCB in this case (figure 9 a).<br />

A package resistance R1 = 1.3 K/W has been considered for<br />

all simulations.<br />

At first, a parametric study has been performed in which<br />

the polymer thickness has been varied while keeping the Cu<br />

studs pitch fixed. Figure 9b reports the results and<br />

demonstrates that the presence of Cu studs with a<br />

sufficiently small pitch affects significantly the thermal<br />

resistance of the polymer layer. The copper provides for an<br />

effective heat conduction path (fig. 10), and reduces<br />

considerably the overall stack temperature. The maximum<br />

temperature in a stack with dummy Cu studs is found to be<br />

almost independent on the polymer thicknesses when the<br />

studs pitch is small, thus the copper thermal impact is more<br />

significant for thicker BCB layers. A similar conclusion can<br />

be drawn from figure 9c, where the copper impact as a<br />

function of bumps pitch is explored for two different BCB<br />

thicknesses.<br />

©<strong>EDA</strong> <strong>Publishing</strong>/THERMINIC 2009 59<br />

ISBN: 978-2-35500-010-2

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