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Online proceedings - EDA Publishing Association

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7-9 October 2009, Leuven, Belgium<br />

A Temperature-Dependent POWER MOSFET Mode1 for Switching Application<br />

H. DIA 1,2 , J.B. Sauveplane 1 , P. Tounsi 1,2 , J-M. Dorkel 1,2<br />

1 CNRS; LAAS; 7 avenue du Colonel Roche, F-31077 Toulouse, France<br />

2 Université de Toulouse; UPS, INSA, INP, ISAE; LAAS; F-31077 Toulouse, France<br />

dia@laas.fr<br />

Abstract- in this paper, an electrical model of a power vertical<br />

MOSFET sensitive to temperature is proposed using VHDL-AMS<br />

code. Our modeling approach is based on basic physical MOSFET<br />

effect and on its technological structure. Thermal sensitivity of<br />

MOSFET parameters is discussed and characterized. Validation<br />

of the model accuracy is presented by comparison between<br />

simulations and experimental results. Among the benefits of this<br />

technique are fast simulation, good agreement between<br />

simulations and measurements and useful insights into thermal<br />

sensitivity of MOSFET performance in switching applications.<br />

This work is the first step to electro-thermal simulation of power<br />

device by simulator coupling.<br />

studies of the device [4] addressing basic equations in the<br />

semiconductor. Each area of the MOSFET structure shown on<br />

“Fig.1.”((1) Channel, (2) access, (3) PN - junction, (4) drift and<br />

(5) substrate) is described taking into account the main<br />

characteristics of the power device: linear, saturated behavior<br />

and non linearity of the gate-drain and drain-source<br />

capacitances.<br />

Keywords-modeling, power MOSFET, power diode, VHDL-AMS.<br />

I. INTRODUCTION<br />

Continuous improvement in power devices performances<br />

involves the reduction of their sizes which increases power<br />

losses density even in a same application context. As reliability<br />

relies most of the time on maximum temperature variation of<br />

the chip, electro-thermal simulation of a power device within<br />

its environment becomes a key tool to avoid re-design of a<br />

chip. In this context electro-thermal model has already been<br />

presented in literature [1]-[2], but the major drawbacks of<br />

previous model is that power device is assumed to be “ON<br />

state” during the simulation. This assumption is valid only if<br />

power switching losses are negligible or if switching behavior<br />

is not relevant to the application. To overcome these limitations<br />

a new approach has been developed based on simulator<br />

coupling to accurately simulate the electro-thermal behavior of<br />

the power device [3]. This paper is the first step toward this<br />

modeling approach as it presents an electrical model of a power<br />

vertical MOSFET, sensitive to temperature, using VHDL-AMS<br />

code. The power device studied is a low voltage vertical power<br />

MOSFET with ultra low on state resistance. The paper is<br />

divided in two parts. First the electrical model of the power<br />

device sensitive to temperature is detailed, based on basic<br />

physical MOSFET effect and on its technological structure.<br />

Then the extraction procedure to obtain the model parameter is<br />

presented and at the end a comparison between simulations and<br />

experimental result are shown for a power device in a<br />

switching application.<br />

II. THE POWER MOSFET MODEL<br />

A. The Electrical Model<br />

The modeling approach relies on experimental and simulation<br />

Fig. 1. Cross section of power MOSFET<br />

The body diode, P (body)/ N- (epitaxial layer) junction has also<br />

been implemented in the model. This diode allows the<br />

simulation of the transistor's reverse bias behavior. The model<br />

of the body diode is based on a previous work on the power<br />

PIN diode [5].<br />

Fig. 2. The body diode model<br />

This model “Fig.2.” takes into account the forward and reverse<br />

behavior of a diode and also the reverse recovery current<br />

phenomena caused by the charge stocked in the intrinsic region<br />

during the forward polarization. The forward phase is modeled<br />

by a resistor R on , which means that the forward polarization<br />

phase is a simple one “Fig.3.” And it’s sufficient enough to<br />

address the thermal issues, a conductance G off for the reverse<br />

phase and to model the leakage current; all this is compact in<br />

the IdealDiode model. The voltage depended current source Jc<br />

©<strong>EDA</strong> <strong>Publishing</strong>/THERMINIC 2009 87<br />

ISBN: 978-2-35500-010-2

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