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thickness, and optimization of nanoscale thermal and electrical contact surfaces (see Fig. 1). To tackle the overall project purpose, four major technical objectives are targeted: • To develop new interface technologies for low thermal and electrical resistance and discover new high-density integration technologies; • To develop new characterisation methods and tools for thin and highly conductive interface layers; • To understand heat transfer on a micro/ nano scale thanks to simulative and nano-analytical methods; • To build optimal demonstrators with respect to thermal, electrical and reliability-related properties to create impact in several industries. III. PROJECT STATUS AND PROGRESS In order to successfully achieve the project goals and enable the development of leading thermal management and interconnect technologies at the horizon of 2010, the project has been organized into 6 main technical work packages which address the following research issues: materials and process development, thermal, electrical and mechanical characterizations, nano- to macro-scale modeling and simulations. Several demonstrators will be designed to validate the adequacy of the technologies with applications such as microprocessors, automotive and aerospace high power electronics and high power radio-frequency switches. 7-9 October 2009, Leuven, Belgium B. Process Development and Optimization These activities aim at establishing new manufacture and integration process which enables more efficient heat removal in modern integrated circuits and microsystems. Several parallel routes are studied. A surface modification technique based on micromachined hierarchical nested channels (HNC) has proven its efficiency to reduce the final BLT by > 20% for the majority of TIMs on 1-250cm2 interfaces. Au-nanosponge surface enhancement technique is also under evaluation to decrease interfacial contact resistance. Properties of randomly distribubted and aligned Carbon Nanotubes (CNT) are currently studied. A specific process has been establish to manufacture a metal-polymer composite with thermal conductivty as high as 20 W/mK. Finally, fine pitch CNT bumps reported with isotropic adhesives are serious candidates as future flip chip interconnect technology (Fig. 3). Fig. 2. NANOPACK Work Packages A. Materials Development Thermal grease, thermal conductive adhesive, thermal conductive phase change materials and electrically conductive adhesive (ECA) are currently developped in the project. The fabrication methodology is based on the synthesis of nano-structured materials such as nanoparticles, nanotubes, nanofibrils and on the optimisation of dispersing technologies to generate minimum thermal barriers between nano-fillers and matrix to achieve a maximum thermal conductivity. More than 6 W/mK as thermal conductivity has been reached by bimodal thermal grease, with spherical metallic micro spheres and graphitsed Carbon Nano Fibers (CNF) in Silicone matrix. Bimodal ECA with 9.5 W/mK as thermal conductivity has been fabricated by incorporating silver flakes and micro silver spheres in bi-epoxy matrix. Reliability tests are under progress. Fig. 3: CNT bumps transferred by patterned Isotropic Conductive Adhesive films C. Fabrication of Test Structures and Characterisation This work is focused on the characterization of the interface materials developed in the project along with their process dependence in thermal, electrical and thermomechanical properties. It requires to manufacture test structures to facilitate the in-situ measurement of thin layers of very high thermal conductivity materials. Additional test structures are also realised in order to investigate the electrical properties of microscale particle stacks for electrical interconnects in power electronics die attach. Failure of interfaces and crack propagation are studied thanks to advanced in-situ thermo-mechanical experiments. Thermal resistance values smaller than 10 mK/W are expected to be measured with an accuracy of 3 - 5 % thanks to original designs of several TIM testers in steady state. Spatially resoluted measurements of electrical conductivity with 5 μΩ resolution are also on stakes. The 3-omega method is also adapted in the project to retrieve local information on the subcontinuum (spatial dispersion) heat conduction as nanostructured materials offer a promising way to increase the heat transfer between TIMs and their substrates. E. Modeling and Simulations State-of-the-art simulation techniques are developed to better understand heat transfer at the nano and micro scales in thin films and dense particle systems. Analytic techniques, FDTD methods and molecular dynamics simulations are used to explore phonon properties in nano scale systems. In ©EDA Publishing/THERMINIC 2009 193 ISBN: 978-2-35500-010-2
7-9 October 2009, Leuven, Belgium addition to more scientific studies, traditional tools such as finite element analysis for mechanical structures are incorporated for design of demonstrator devices and failure analysis. F. Demonstrators With better cooling as developed in the NANOPACK project, electronic components can be packed more densely and be operated at higher power levels. This strongly increases the energy efficiency of the systems by reducing the need for chiller systems and limiting the waste of materials associated with lower density systems. The objective of this work is to exploit the newly enabled technologies by demonstrating several devices owning unprecedented thermal and electrical capabilities, in the fields of microprocessors, automotive and aerospace high power electronics and high power radio-frequency switches. IV. LIST OF PARTNERS The NANOPACK consortium consists of 4 major industrial partners, 4 innovative SMEs, and 6 academic groups in total representing 8 European countries: Thales Research & Technology, France Budapest University of Technology and Economics, Hungary Robert Bosch GmbH, Germany Institut d’Electronique de Microtechnologies et de Nanotechnologie, France Chalmers University of Technology, Sweden Electrovac AG, Austria Foab Elektronik AG, Sweden Fraunhofer Insititut IZM, Germany IBM Zurich Research Laboratory, Switzerland Catalan Institute of Nanotechnology, Spain MicReD Ltd. Hungary Berliner Nanotest und Design GmbH, Germany Thales Avionics, France VTT Micro and Nanoelectronics, Finland ACKNOWLEDGMENT This work is supported by the European Commission 7 th Framework Programme (FP7), under the grant agreement n°216176 (NANOPACK). ©EDA Publishing/THERMINIC 2009 194 ISBN: 978-2-35500-010-2
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International Workshop on THERMal I
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