Online proceedings - EDA Publishing Association

7-9 October 2009, Leuven, Belgium
Fig. 10. Schematic representation of the experimental set up to validate the
thermal modeling [14].
IV. DISCUSSION OF SIMULATION RESULTS
Fig. 8 shows the temperature distribution in the ‘metal 2’
layer of the top die. This is the layer where the power is
dissipated. A sharp temperature peak can be observed at the
location of the hot spots. As expected the temperature peak
is higher in the smaller hotspots due to the higher power
density. In this case with the power dissipation in the metal
layer of the BEOL structure a very sharp peak is observed
due to the poorly conductive oxide layers surrounding it. For
normal operation with heat dissipation in the bulk of the Si a
less pronounced peak is expected. The influence of the TSV
density can be seen on Fig. 8: in the case without TSVs the
maximum temperature amounts to 8.08°C in the 50x50µm²
hot spot. For the TSV density of 7x7µm² and 11x11µm² the
temperature peak is 7.15°C and 5.51°C respectively. In the
case of the 50x50µm² hotspots the effect of TSV density is
less pronounced. Fig. 9 shows a surface plot of the heat flux
in the bulk of the Si of the top die. At the top of the TSV an
influx of heat can be seen. The heat is generated fairly
uniform in the layers on top the Cu TSVs. The heat will flow
down through the stack concentrated through the Cu TSVs.
V. EXPERIMENTAL VALIDATION APPROACH
To trust and improve the proposed approach of the
detailed thermal modeling the simulations need to be
validated by experimental results. To be able to evaluate the
thermal modeling early in the development of the 3D
integration including the TSVs a more simplified version of
the packaged die stack is considered. Therefore a dedicated
thermal test vehicle has been developed to experimentally
characterize the thermal effects in the stacked die structure
and to validate the modeling approach [14]. Fig. 10 shows a
schematic of the simplified package on which transient
thermal measurements are performed. The die stack is glued
to a Cu interposer plate. This Cu plate is attached to a watercooled
cooling block. On top of the outer edge of the Cu
plate a PCB is connected. In this PCB an opening is
provided to fit the die stack. Wirebonds from both the top
and bottom die to bonding pads on the PCB provide the
electrical connections to access the heaters and diodes in the
die stack. The power is dissipated in heaters located in the
BEOL structure of the top die. Temperature is measured
using temperature sensitive diodes which are located in both
top and bottom die. Assembly and testing of experimental
set-up is ongoing at the time of publication.
TIM 1
glue
Cu plate
TIM 2
Water cooled heat sink
PCB
VI. CONCLUSIONS
In this paper a methodology to perform a detailed, fine
grain thermal analysis of the stacked die structure is
presented. This methodology allows to include the complete
detail of the design layout and the full description of the
BEOL structure of all the dies in the stack. The approach is
demonstrated on a test case of a stacked die structure of two
dies BGA package. Both the complete design layout of the
top and bottom die, including the interconnections, such as
TSVs and solder balls, between both dies are combined to a
3D design. A detailed thermal simulation with a spatial
resolution of 100 nm is performed based on the 3D layout
specified in the GDSII file and the definition of the stack of
materials. Using this approach the thermal influence of the
proximity and array density of the below the heat sources
TSVs in the top die is studied.
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©EDA Publishing/THERMINIC 2009 49
ISBN: 978-2-35500-010-2