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T junction Tinterface model 1 are small, they can be reused and shared between the different design teams. Precisely, the methodology homogenizes the models at different integration levels to facilitate the share of the models. In that way, a designer builds finely its own model of interest using other available micro-models of materials and environments. Moreover, the Flex-CTM models contain few information of the original system. The geometrical and physical properties of the system are included implicitly in the model. Therefore, the models can preserve a confidentiality of the system properties. Finally, the Flex-CTM have the “Flexible” property. Meaning that each micro-model of the Flex-CTM can be modified independently and replaced by another one. VI. EVALUATION OF THE PERFORMANCES OF THE FLEX-CTM METHODOLOGY The methodology is evaluated with a simple co-simulation test case. The studied system is a die in a Ceramic Pin Grid Array (CPGA) package, plugged on a Printed Circuit Board (PCB). The typical use is an integrator who wants to characterize a board for a given component. The integrator may have obtained the die and package information in datasheets or even their micro-models. The geometry of the IC package is described Figure 6. Lid Step 2 Step 2 Step 1 Die Step 1 Substrate Pins PCB Figure 6: CPGA Geometrical Description To evaluate the influence of the board on which the component will be plugged, the component is connected to two different boards (Figure 7). a) b) Figure 7: Studied Printed Circuit Boards a) 1s0p b) 2s2p 7-9 October 2009, Leuven, Belgium The model has been built with the typical values of the material thermal properties which can be found in the literature [11]. The air layer surrounding the die is assumed to be insulating due to its very weak thermal conductivity. So, in this case a unique die-to-package heat flow path through the bottom face of the die is considered. The CPGA is simulated applying a uniform power source of 1W on the junction surface. A reference measure of the average temperature on the Die junction is obtained by simulating a FEM model of the full circuit. This measure is a reference to evaluate the methodology in terms of accuracy, model size and simulation time. The first step of the Flex-CTM methodology splits the CPGA geometry into 4 descriptions according to the physical properties (see Figure 8). Die Pins Figure 8: Model Splitting CPGA Package PCB The junction interface is on the top of the die and the model contains 3 coupling interfaces. The first one links the die to the package substrate, the second one links the package substrate to the pins and the last one links the pins to the PCB. The 4 (Die, Package, Pins, PCB) FEM models of the system are extracted in their respective numerical systems G 1,2,3,4 and C 1,2,3,4 with their related node properties. Concerning the heat transfer coefficients, they are identified using a commercial CFD tool. Then they are embedded in the CPGA Package and in the board models. The nodes belonging to the interfaces of the models are kept during the reduction process. TABLE I summarizes the number of nodes of each part at different steps of the methodology. The number in brackets indicates the number of external nodes kept of each micro-model. 1. System Splitting 2. Model Extraction 3. Node Selection 6. Simulation with Specific Condition Setting Mean tem peratures 25 5. Model Coupling 4. Model Reduction T [deg] 20 15 T interface model 2 10 tim e [s] 5 0 10 -6 10 -4 10 -2 10 0 10 2 10 4 Lagrange Multipliers Figure 9: Building Process of the Flex-CTM Methodology G,C matrices ©EDA Publishing/THERMINIC 2009 21 ISBN: 978-2-35500-010-2
TABLE I MODEL PARTS CHARACTERISTICS Part FEM Model Sub sampled Model Reduced Model Die 70k (2600) 65k (227) 335 (227) Package 147k (12k) 136k (356) 643 (356) Pins 69k (3400) 66k (200) 208 (200) PCB 1s0p 178k (900) 177k (100) 978 (100) PCB 2s2p 178k (900) 177k (100) 822 (100) Once the micro-models are available, they are coupled together through their corresponding coupling interfaces (E’). An assembly (die-package-pins) resulting of the coupling of the die, package and pins models is obtained. Then, to study the influence of the board, each PCB micromodel is connected successively to the assembly. So, two Flex-CTM of the whole system are built, one for each board. Finally, a power step source of 1 W is uniformly distributed on the Junction interface P'. Reference simulations of the global FEM model are computed for each board and the corresponding Flex-CTMs are simulated under the same simulation conditions (Figure 10). Figure 10: Original Model and Flex-CTM Temperatures The comparisons in terms of accuracy, model size and simulation time between the original CPGA and the Flex- CTM are summarized in TABLE II. The first Flex-CTM needs about 4 hours to be built. The second needs only one half hour because the assembly die-package-pins is reused. TABLE II ORIGINAL AND FLEX-CTM MODELS PERFORMANCES Model Size Simulation Time FEM Assembly 1s0p 530k 24 hours Flex-CTM 1s0p 1583 12 seconds FEM Assembly 2s2p 530k 24 hours Flex-CTM 2s2p 1427 12 seconds Maximal Absolute Error 0.57°C 0.52°C VII. CONCLUSIONS AND FUTURE WORK The Flex-CTM methodology meets the needs of electronic engineers to perform a fast temperature analysis of a complex electronic system at different integration levels. Flex-CTM are BCI, so they can be reused whatever the environment is. Many power sources can be applied on 7-9 October 2009, Leuven, Belgium junction nodes allowing hot spot detection on a die. Moreover, Flex-CTM have a few node number, which allows multiple exploration or electro-thermal simulation in a short window of time. Finally, the methodology allows system designers to share their work at different integration levels. The methodology has been evaluated with a simple testcase at the package modeling level. The results show that Flex-CTM meet the specifications required, specifically in terms of accuracy and simulation time saving. The next step is now to enhance the methodology with an automated selection of the number and the position of nodes at the interfaces. This progress will ensure a higher accuracy and an optimal size of the Flex-CTM. Besides, several test cases covering multi-level design aspects are to be run in order to go on further the validation and to better characterize the methodology. Finally, a multi-source co-simulation test case will be studied to fit with a more realistic system. REFERENCES [1] H. Vinke and C. Lasance, "Compact Models for Accurate Thermal Characterization of Electronic Parts", IEEE Transactions on Components, Packaging and Manufacturing Technology – Part A, Vol. 20, NO. 4, December 1997 [2] F. Chrisitiaens, B. Vandevelde, E. Beyne, R. Mertens and J. Berghmans, "A Generic Methodology for Deriving Compact Dynamic Thermal Models, Applied to the PSGA Package", IEEE Transactions on Components, Packaging and Manufacturing Technology – Part A, Vol. 21, NO. 4, December 1998 [3] C. Lasance, "The European Project PROFIT: Prediction of Temperature Gradients Influencing the Quality of Electronic Products", Proceedings of the SEMITHERM XVII, pp. 120 – 125, 2001 [4] C. Lasance, "Highlights from the European Thermal Project PROFIT", Journal of Electronic Packaging, Vol 126, pp 565 – 570, December 2004 [5] W. Huang, K. Sankaranarayanan R.J. Ribando, M.R. Stan and K. Skadron, "An Improved Block-Based Thermal Model in HotSpot 4.0 with Granularity Considerations", Proceedings of the Workshop on Duplicating, Deconstructing, and Debunking (WDDD), in conjonction with the 34 th International Symposium on Computer Architecture (ISCA), 2007. [6] Hang Li, Pu Liu, Zhenyu Qi, Lingling Jin, Wei Wu, Sheldon X.D.Tan, and Jun Yang, "Efficient Thermal Simulation for RunTime Temperature Tracking and Management", Proceedings of the 2005 International Conference on Computer Design (ICCD'05). [7] D. Celo, X. Guo, P. K. Gunupudi, R. Khazaka, D.J. Walkey, T. Smy and M.S. Nakhla, "The Creation of Compact Thermal Models of Electronic Components Using Model Reduction," IEEE Transactions on Advanced Packaging, Vol. 28, NO. 2, May 2005. [8] L. Codecasa, D. D'Amore and P. Maffezzoni, "An Arnoldi Based Thermal Network Reduction Method for Electro-Thermal Analysis", IEEE Transactions on Components and Packaging Technologies, Vol. 26, No. 1, March 2003. [9] G. Strang, "Introduction to Applied Mathematics", Wellesley Cambridge. Press USA, 1986. [10] T. Bechtold, E. B. Rudnyi, M. Graf, A. Hierlemann, J.G. Korvink, "Connecting Heat Transfer Macromodels for MEMS Array Structures", Journal of Mechanics and Microengineering, 15(6), pp 1205 – 1214, 2005 [11] MatWeb, division of Automation Creations, Inc http://www.matweb.com ©EDA Publishing/THERMINIC 2009 22 ISBN: 978-2-35500-010-2
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