Online proceedings - EDA Publishing Association
Online proceedings - EDA Publishing Association
Online proceedings - EDA Publishing Association
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7-9 October 2009, Leuven, Belgium<br />
0.8<br />
0.75<br />
Voltage [V]<br />
0.7<br />
0.65<br />
0.6<br />
Sensor<br />
Localization<br />
0.55<br />
0.5<br />
0.45<br />
0 20 40 60 80 100 120 140 160<br />
Temp [C]<br />
Fig. 3. Simulations of the output signal from the sensor.<br />
III.<br />
SIMULATIONS<br />
The whole system containing the PTAT sensor, as already<br />
mentioned in previous section, was simulated in the<br />
CADENCE environment. In order to simulate this circuit,<br />
the transistor models from the austriamicrosystems ® (AMS)<br />
0.35 μm high voltage technology were used. This technology<br />
was chosen for the practical realization of the ASIC. The<br />
simulations confirmed that the behavior of the sensor<br />
conforms to the design specifications. With increasing<br />
temperature, the sensor output voltage decreases with the<br />
negative slope of –1.72 mV/K. When temperature reaches<br />
150 °C, the additional current mirror is switched off and the<br />
current delivered to the bipolar transistor is twice smaller.<br />
This means that the output voltage rapidly drops down by<br />
some 25 mV what allows the generation of logic one at the<br />
overheat warning pin, which is clearly visible in Fig. 3.<br />
When temperature decreases, the output voltage increases<br />
again. When the temperature reaches 130 °C, the output<br />
voltage rapidly grows and the warning signal is switched off,<br />
which can be observed in Fig. 4.<br />
Fig. 5. Photo of a die.<br />
IV. ASIC REALIZATION<br />
The presented overheat protection circuit containing the<br />
PTAT sensor, as already mentioned, was manufactured in<br />
the thermal test ASIC designed in the Department of Microelectronics<br />
& Computer Science at the Technical University<br />
of Lodz, Poland. The location of the sensor in the circuit<br />
layout is shown in Fig. 5. For full description of the test<br />
ASIC, refer to [6]-[7].<br />
The sensor layout, presented in Fig. 6, consists of 9 PMOS<br />
transistors which are connected as current mirrors. Besides,<br />
there are 3 bipolar transistors and 1 polysilicon resistor. All<br />
the devices are placed so as to obtain the minimal area in the<br />
ASIC. Because the circuit contains 9 large power transistors<br />
acting as heat sources, the total area of the whole ASIC<br />
amounts to almost 20 mm 2 . The dimensions of the PTAT<br />
sensor alone are 125 μm × 90 μm, so it is a very small sensor<br />
which can be used in different integrated circuits, where<br />
precise temperature measurements are necessary. Obviously,<br />
the PTAT sensor together with the overheat warning system<br />
occupies slightly bigger area.<br />
Voltage [V]<br />
3<br />
2.5<br />
2<br />
1.5<br />
1<br />
0.5<br />
MOS<br />
Transistors<br />
Bipolar<br />
Transistors<br />
Resistor<br />
0<br />
0 20 40 60 80 100 120 140 160<br />
Temp [C]<br />
Fig. 4. Simulations of the overheat warning signal.<br />
Fig. 6. Layout of PTAT sensor.<br />
©<strong>EDA</strong> <strong>Publishing</strong>/THERMINIC 2009 82<br />
ISBN: 978-2-35500-010-2