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T [oC] 55 50 45 40 35 30 t [s] 0 500 1000 1500 2000 2500 Fig. 15. Heat dissipation and power consumption IV. CONCLUSIONS 100% (SO) 75% (SO) 60% (SO) 60% (AP) The work presented in this paper tried to evaluate the thermal response of the mobile system CPU and its cores related to the running software applications. We tried to characterize the thermal impact of system CPU cores due to the workload threads of the executed applications. We investigated the possibility to identify the effect of every running application in the system over the CPU, cores and system temperatures. We proposed a set of test cases to identify relation between different system’s and application’s parameters and temperature. Based on our experiments, the process of thermal effect split among running applications is not a simple task and depends on many factors. For certain cases and workloads we can do that split based on workload type, CPU usage level and threads and cores used. ACKNOWLEDGMENT This work was supported by Romanian Ministry of Education CNCSIS grant 680/19.01.2009. REFERENCES [1] Eren Kursun, Chen-Yong Cher, Alper Buyuktosunoglu, Pradip Bose, “Investigating the Effects of Task Scheduling on Thermal Behavior”, Third Workshop on Temperature-Aware Computer Systems (TACS 2006), 2006. 7-9 October 2009, Leuven, Belgium [2] S.H. Gunther, F. Binns, D.M. Carmean, and J.C. Hall, “Managing the Impact of Increasing Microprocessor Power Consumption”, Intel Technology Journal, Q1, 2001 [3] K. Skadron, M.R. Stan, W. Huang, S. Velusamy, K. Sankaranarayanan, and D. Tarjan, “Temperature-aware Microarchitecture”, Proceedings of the 30 th ACM/IEEE International Symposium on Computer Architecture, San Diego, CA, June 2003, pp. 2-13. [4] Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik, Sankaranarayanan, David Tarjan, “Temperature-Aware Computer Systems: Opportunities And Challenges”, IEEE Micro, Dec. 2003. [5] V. Szekely, M. Rencz, and B. Courtois, “Tracing the Thermal Behaviour of ICs”, IEEE Design&Test of Computers, Vol. 15, No. 2, April-June 1998, pp. 14-21. [6] Pedro Chaparro, Jose Gonzalez, Grigorios Magklis, Qiong Cai, and Antonio Gonzalez, “Understanding the Thermal Implications of Multicore Architectures”, Ieee Transactions On Parallel And Distributed Systems, Vol. 18, No. 8, Aug. 2007. [7] Kyeong-Jae Lee and Kevin Skadron, “Using Performance counters for Runtime Temperature Sensing in High-Performance Processors”, Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS’05), 2005. [8] Michael Huang, Jose Renau, Seung-Moon Yoo, and Josep Torrellas, “A framework for dynamic energy efficiency and temperature management”, Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture, pp. 202- 213, 2000. [9] Jieyi Long, Seda Ogrenci Memik, Gokhan Memik, and Rajarshi Mukherjee, “Thermal Monitoring Mechanisms for Chip Multiprocessors”, ACM Transactions on Architecture and Code Optimization, Vol. 5, No. 2, Aug. 2008. [10] Ke Meng, Russ Joseph, Robert Dick, and Li Shang, “Multioptimization power management for chip multiprocessors”, Proceedings of the 17th International Conference on Parallel Architectures and Compilation Techniques, Canada, 2008. [11] Marcu Marius, Vladutiu Mircea, Moldovan Horatiu, Popa Mircea, “Thermal Benchmark and Power Benchmark Software”, Proceedings of the 12th IEEE International Workshops on THERMal Investigations of ICs and Systems, THERMINIC 2006, Nice, France, Sep. 2006, pp. 203-208. [12] Marcu Marius, Dacian Tudor, Moldovan Horatiu, Sebastian Fuicu and Popa Mircea, “Energy characterization of mobile devices and applications using power– thermal benchmarks”, Microelectronics Journal, Vol. 40, No. 7, pp. 1141-1153, Jul. 2009. ©EDA Publishing/THERMINIC 2009 149 ISBN: 978-2-35500-010-2
7-9 October 2009, Leuven, Belgium Hotspot-adapted Cold Plates to Maximize System Efficiency Thomas Brunschwiler, Hugo Rothuizen, Stephan Paredes, and B. Michel IBM Research GmbH, Zurich Research Laboratory, 8803 Rüschlikon, Switzerland tbr@zurich.ibm.com, +41 44 724 86 81 Evan Colgan IBM T.J. Watson Research Center, 1101 Kitchawan Road, Yorktown Heights, NY 10598, USA Pepe Bezama IBM East Fishkill, 2070 Route 52, Hopewell Junction, NY 12533, USA This modeling study is focused on the potential and the limitations of hotspot-adapted liquid heat removal to improve on system pumping power and on the re-usability of output heat, for various packaging schemes at the component level. This is in particular important to improve the power efficiency of datacenters with the consequence to reduce total cost of ownership and their impact on the environment. Inefficient air cooling is responsible for up to 40% of their total power consumption. High-performance liquid cooling has the potential to reduce this number substantially and makes the direct re-use of produced heat in neighborhood-heating networks viable. The application of normal-flow and crossflow cold plate architectures is discussed. Custom-tailored normal-flow cold plates can be produced with high spatial contrast in heat transfer with a granularity of 1 mm 2 . For conventional processor chip packages this results in a flow rate reduction and fluid temperature differential (T fout -T fin ) increase of 28%. This also translates into a net pumping power decrease of 43% for a server rack with multiple heat sources. Heat flux tailoring with cross-flow heat exchangers is subject to the additional constraint of a fixed volume flow over the length of the channels, which calls for modulation of the heat transfer geometry along the channel in order to address hot spots. In this study the fluid flows through a layered-mesh network, in which the number of mesh layers is modulated. For standard packages employing thermal grease interfaces, we find that for a given flow rate, there is little benefit in terms of maximal junctions temperature at the expense of a significant increase in pressure drop. The parameter improving is the on-chip temperature variation. We conclude the study with recommendations on how to design hotspot-adapted cold plates. I. INTRODUCTION Worldwide, the number, size, and power consumption of datacenters doubled between 2000 and 2005 due to information technology (IT) consolidation trends and increased demand from Web2.0 applications, such as video streaming. Large datacenters consume up to 200 MW of electricity, of which 40% is used only to run the cooling infrastructure and is representing a significant portion to the operating cost [1]. This is the result of the use of inefficient air-cooling technology, which relies on computer-room airconditioners. The power usage effectiveness (PUE), defined as the ratio of total datacenter power divided by the power consumption of the IT equipment, can be improved by implementing advanced liquid-cooling technology [2]. For low thermal gradients from junction to the fluid of ≤ 20 K and a junction temperature limit (T jmax ) of 85°C, the ITequipment can be cooled without chillers all year long. Moreover, in cold and moderate climates, the ≥ 65°C “waste” heat from liquid cooling can be sold to district heating networks [3]. The value of this available heat depends strongly on the its quality, namely temperature level. In this study we report on the potential benefits of hotspotadapted cold plates on the component level. Cooling the spatially non-uniform power dissipation of processors [4] by means of uniform heat transfer is not a efficient solution [5]. Too much pumping power is spent on chip areas with low heat flux. Furthermore exergy is reduced as the cold and hot fluids mix at the outlet manifold of the cold plate, reducing the value of the available heat. Moreover, this type of cooling also results in high temperature gradients on the die, causing thermo-mechanical-stress-induced aging. Tailored, steady-state normal-flow and cross-flow heat transfer concepts on the component level are presented and benchmarked against uniform heat removal. Their benefit in different packages is discussed. Finally the cold-plate efficiency in a complete server rack with multiple heatgenerating devices is reported. II. SPATIALLY RESOLVED HEAT REMOVAL Non-uniform heat transfer for a given unit-cell heat-transfer geometry can be realized in normal flow (Fig. 1a) and jet array cold plates [10] by local flow throttling. The parallel fluid feed allows each unit cell to be addressed independently, by changing the fluid delivery diameter of each unit cell. The modulation in cross-flow heat exchangers [9] is constrained. The volume flow rate can only be changed for zones transversal to the flow direction, but is constant for subsequent unit cells. Therefore the heattransfer geometry (such as the channel hydraulic diameter or cavity porosity) is modified to modulate all unit cells individually (Fig. 1b). ©EDA Publishing/THERMINIC 2009 150 ISBN: 978-2-35500-010-2
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