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Superconducting Technology Assessment - nitrd

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APPENDIX J: CAD<br />

Figure 1: Circuit design and verification 203<br />

Figure 2: Schematic view 204<br />

Figure 3: Symbol view 205<br />

Figure 4: VHDL view 206<br />

Figure 5: Physical layout view 207<br />

Figure 6: LMeter is specialized software that extracts the inductance value 208<br />

of an interconnect from the physical layout<br />

Figure 7: VHDL simulation performed on a large, mixed signal superconductor circuit 209<br />

Figure 8: Layout-versus-Schematic verification on the chip level for a large chip 210<br />

Figure 9: First-pass success is routine for circuits of up to a few thousand JJs 211<br />

APPENDIX K: DATA SIGNAL TRANSMISSION<br />

Figure 1: Channel loss for 50 cm electrical link 214<br />

Figure 2: Long path data signal transmission requirements for one proposes petaflop architecture 215<br />

Figure 3: Four channel transceiver arrays produced by the IBM/Agilent effort funded by DARPA 216<br />

Figure 4: A 64-fiber, 4-wavelength, 25-Gbps CWDM system for bidirectional transmission 220<br />

totaling 6.4 Tbps between a superconductive processor at 4 K and high speed mass<br />

memory at 300K<br />

Figure 5: A 3-fiber, 64-wavelength, 50-Gbps DWDM system for bidirectional transmission 221<br />

totaling 6.4 Tbps between a superconductive processor at 4 K and high speed mass<br />

memory at 300K<br />

APPENDIX L: MULTI-CHIP MODULES AND BOARDS<br />

Figure 1: Packaging concept for HTMT SCP 227<br />

Figure 2: A multi-chip module with SCE chips 228<br />

Figure 3: Lead inductance vs. bond length or height for different attach techniques 229<br />

Figure 4: Heterogeneous stacking technology for system-in-stack 232<br />

Figure 5: Stacks containing superconducting electronics circuits were cycled 232<br />

from RT to 4 K several times<br />

Figure 6: A prototype cryo enclosure for operation at 4 K 233<br />

Figure 7: A typical cryocooler enclosure designed for communication applications 234<br />

Figure 8: A rack mounted cryocooler enclosure example 234<br />

Figure 8: Northrop Grumman’s high-efficiency cryocooler unit 236<br />

Figure 9: Refrigerator efficiency of various cooling systems 237<br />

Figure 10: Concept for a large-scale system including cryogenic 237<br />

cooling unit for supercomputers<br />

Figure 11: The cost of various refrigerators as a function of refrigeration 239<br />

Figure 12: A high-speed flexible ribbon cable designed for modular attachment 240

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