Superconducting Technology Assessment - nitrd

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thick NbN ground plane and lower parasitic circuit inductances,”
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[83] H. Numata, S. Nagasawa, M. Tanaka, and S. Tahara, “Fabrication
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polishing planarization,” IEEE Trans. Appl. Superconduct.,
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“Sub-"m, planarized, Nb-AlO -Nb Josephson process for 125 mm
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quality, deep-submicron Nb/AlO /Nb Josephson junctions using
chemical mechanical polishing,” IEEE Trans. Appl. Superconduct.,
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Lavoie, “High-performance Nb integrated circuit process fabrication,”
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2003.
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below ground plane wiring on one side of a supporting substrate and
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“The detection of defects in a niobium tri-layer process,” IEEE
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1532 PROCEEDINGS OF THE IEEE, VOL. 92, NO. 10, OCTOBER 2004