Superconducting Technology Assessment - nitrd

Superconductor Integrated Circuit
Fabrication Technology
LYNN A. ABELSON AND GEORGE L. KERBER, MEMBER, IEEE
Invited Paper
Today’s superconductor integrated circuit processes are capable
of fabricating large digital logic chips with more than 10
K gates/cm P . Recent advances in process technology have come
from a variety of industrial foundries and university research
efforts. These advances in processing have reduced critical current
spreads and increased circuit speed, density, and yield. On-chip
clock speeds of 60 GHz for complex digital logic and 750 GHz for
a static divider (toggle flip-flop) have been demonstrated. Large
digital logic circuits, with Josephson junction counts greater than
60 k, have also been fabricated using advanced foundry processes.
Circuit yield is limited by defect density, not by parameter spreads.
The present level of integration is limited largely by wiring and
interconnect density and not by junction density. The addition
of more wiring layers is key to the future development of this
technology. We describe the process technologies and fabrication
methodologies for digital superconductor integrated circuits and
discuss the key developments required for the next generation of
100-GHz logic circuits.
Keywords—Anodization, critical current, flip-flop, foundry, interlevel
dielectric, Josephson junction, niobium, niobium nitride,
100-GHz digital logic, photolithography, planarization, quantum
computing, qubit, rapid single-flux quantum (RSFQ), reactive ion
etch, resistor, SiOP, superconductor integrated circuit, trilayer.
I. INTRODUCTION
In the past ten years, low-temperature superconductor
(LTS) integrated circuit fabrication has achieved a high level
of complexity and maturity, driven in part by the promise
of ultrahigh speed and ultralow power digital logic circuits.
The typical superconductor integrated circuit has one
Josephson junction layer, three or four metal layers, three
or four dielectric layers, one or more resistor layers, and a
minimum feature size of 1 m. Niobium, whose transition
temperature is 9 K, has been the preferred superconductor
Manuscript received December 3, 2003; revised April 16, 2004.
L. A. Abelson is with Northrop Grumman Space Technology, Redondo
Beach, CA 90278 (e-mail: lynn.abelson@ngc.com).
G. L. Kerber was with Northrop Grumman Space Technology, Redondo
Beach, CA 90278 USA. He is now in San Diego, CA 92117 USA (e-mail:
george.kerber@glkinst.com).
Digital Object Identifier 10.1109/JPROC.2004.833652
0018-9219/04$20.00 © 2004 IEEE
due to its stable material and electrical properties, and ease
of thin-film processing. The Josephson junction, which is
the active device or switch, consists of two superconducting
electrodes (niobium) separated by a thin ( 1 nm thick)
tunneling barrier (aluminum oxide). Josephson junctions,
fabricated in niobium technology, exhibit remarkable electrical
quality and stability. Although the physical structure
of the Josephson junction is simple, advanced fabrication
techniques have been developed to realize a high level of
integration, electrical uniformity, and low defects. Today,
niobium-based VLSI superconductor digital logic circuits
operating at 100 GHz are a near-term reality and could have
a significant impact on the performance of future electronic
systems and instrumentation if the rate of innovation and
progress in advanced fabrication continues at a rapid pace.
The promise of ultrahigh speed and ultralow power
superconductor digital logic began in the mid-1970s with
the development of Josephson junction-based single-flux
quantum (SFQ) circuits. In 1991, Likharev and Semenov
published the complete SFQ-based logic family that they
called rapid SFQ (RSFQ) logic [1]. In 1999, researchers
demonstrated a simple RSFQ T flip-flop frequency divider
(divide-by-two) circuit operating above 750 GHz in niobium
technology [2]. In terms of raw speed, RSFQ logic is the
fastest digital technology in existence [3]. RSFQ logic gates
operate at very low voltages on the order of 1 mV and require
only about 1 W for even the fastest logic gates. As a result,
on-chip RSFQ logic gate density can be very high even for
100-GHz clock frequencies. RSFQ logic is considered to be
the prime candidate for the core logic in the next generation
of high-performance computers [4]–[7] and is recognized
as an emerging technology in the Semiconductor Industries
Association roadmap for CMOS [8]. Recently a prototype
of an 8-b, RSFQ microprocessor, fabricated in the SRL
(formerly NEC) 2.5-kA/cm process (see Table 1), demonstrated
full functionally at a clock frequency of 15.2 GHz
with power consumption of 1.6 mW [9]. Even smaller scale
applications, such as ultrawide band digital communication
PROCEEDINGS OF THE IEEE, VOL. 92, NO. 10, OCTOBER 2004 1517