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Medium Access Control (MAC) and Physical Layer (PHY) - CISE

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4-June-07 P1901_PRO_016_r0<br />

The PCT shall contain, for each possible capability, a value that indicates if the capability is performed or not, <strong>and</strong><br />

the grade of functionality that is running at the time.<br />

The PCT shall also be divided into four sections corresponding to the above mentioned groups of capabilities:<br />

Common, Chip, Reference Design <strong>and</strong> Firmware related.<br />

The common capabilities section is empty until a decision on which capabilities must be considered common for all<br />

vendors is reached. The table is structured as follows:<br />

Capability Section Index Value Default<br />

High<br />

Value<br />

Chip Vendor Chip<br />

Related<br />

1 - - -<br />

Chip Capability<br />

j<br />

…<br />

2 - - -<br />

RD Vendor RD<br />

Related<br />

1 - - -<br />

RD Capability k 2 - - -<br />

…<br />

FW Vendor FW<br />

Related<br />

1 - - -<br />

FW Capability l 2 - - -<br />

…<br />

Table 37 PCT values for the proposed capabilities<br />

Default<br />

Low<br />

Value<br />

As the RUN_CAP_MSG is decoded, the position in the PCT shall be located using the CAP_RUN_REF field<br />

content, <strong>and</strong> then, the correspondent value shall be extracted from the following field called CAP_VALUE. After<br />

Submission page 234 UPA-OPERA

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