TI486 Microprocessor - Al Kossow's Bitsavers

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Testing/Debugging SMM Code i***************************************************** *********************** i * Load SMI address and size into ARR4 i****** ,.****** i****** Config Reg i****** Address mov aI, out 22h, mov eax, shr eax, out 23h, mov aI, out 22h, mov eax, shr eax, out 23h, Ocdh al edx 24 al Oceh al edx 16 al cd ce cf 31-28 27-24, 23-20 19-16, 15-12 31-28 27-24, 23-20 19-16, 15-12 11-8, 7-4 3-0 iregion 41st word i get smi handler address ;move address to al [7-0]=>smbase[31-24] ;region 4 2nd word get smi handler address move address to al [7-0]=>smbase[23-16] mov aI, Ocfh ;region 4 3rd word out 22h, al mov eax, edx get smi handler address shr eax, 8 move address to al and aI, OfOh clear bottom nibble or aI, 1 select 4KB SMI size out 23h, al and [3-0]=>smsize i***************************************************** *********************** pop edx istart of smi area mov eax,edx add edx,1000h ;reserve 4k for smi handler mov ebx,es ;current psp shl ebx,4 sub edx,ebx ;bytes to reserve she edx,4 ;paragraphs to reserve in dx push dx shr eax,4 ;paragraph of smi handler mov es,ax isave for later mov ds,ax mov dx,O ;always starts at 0 mov ax, 2566h ;int 66h vector at 0:198h int 21h pop dx ;tsr address A-27
Testing/Debugging SMM Code imove the code to the smi_area mov al, Oc1h iselect CCR1 out 22h, al in al, 23h ;read CCR1 mov ah, al ;save old value mov al, Oc1h iselect CCR1 out 22h, al mov al, ah iget old value or al, 04h ienable SMAC out 23h,al ibe clean on ah for later RELOCATE = 0 IF RELOCATE sub esi,esi sub edi,edi mov cx, cs mov ds,cx mov ecx, (SMI_SIZE+3)/4 rep movs dword ptr es: [edi],dword ptr ds: [esi] ELSE ;put the far jump at the start of the smi_area to above code mov byte ptr es: [0] , Oeah mov word ptr ex: [1] ,offset smi_handler mov word ptr ex: [3] ,cs ENDIF irestore smi state and enable SMI mov al, Oc1h iselect CCRl out 22h, al mov or out al, ah al, 02h 23h,al iget old value iset SMI bit to enable SMI ibe clean on ah for later COMMENT A SMJ:s may happen at any time now. ;dx = offset in this segment to tsr mov ax, 3100h int 21h Install ENDP i----end of resident code---- endresident label byte Request function 31h, error code=O Terminate-and-Stay-Resident db 2000h dup (?) END Install i**************************************************************************** A-28 Tl486 SMM Programmer's Guide
Page 1 and 2:
.TEXAS INSTRUMENTS TI486 Microproce
Page 4 and 5:
TI486 Microprocessor Reference Guid
Page 6 and 7:
Preface Read This First About This
Page 8 and 9:
About This Manual Appendix D Orderi
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Contents 1 Product Overview .......
Page 12 and 13:
Contents 5.5 AC Characteristics . .
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1-1 TI486SLC/E Functional Block Dia
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Figures 4-27 SUSP Initiated Suspend
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Tables 5-3 Absolute Maximum Ratings
Page 20 and 21:
Product Overview 1-1
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Chapter 1 Product Overview Features
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1.2 Differences Between the TI486SL
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Tl486SLCIE Overview Figure 1-2. TI4
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Tl486DLCIE Overview 1.4 TI486DLC/E
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TI486DLCIE Overview The TI486DLC/E
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Power Management / System Managemen
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Programming Interface 2-1
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Chapter 2 In this chapter, the inte
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Processor Initialization Table 2-1.
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Instruction Set Overview 2.2 Instru
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Register Set 2.3 Register Set There
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Register Set Pointer and Index Regi
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Register Set 2.3.1.2 Segment Regist
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Register Set 2.3.1.3 Instruction Po
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Register Set 2.3.2 System Register
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Register Set 2.3.2.1 Control Regist
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Register Set 2.3.2.2 Descriptor Tab
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Register Set Table 2-6. Segment Des
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Register Set During task switching,
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Register Set The CCRO register (Tab
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Register Set Table 2-9. TI486DLCIE
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Register Set Table 2-12. ARR 1-ARR4
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Register Set 2.3.2.6 Test Registers
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Register Set Table 2-14. TR6 and TR
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Address Spaces 2.4 Address Spaces T
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Address Spaces 2.4.2 Memory Address
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Address Spaces Figure 2-21. Real Mo
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Address Spaces Figure 2-24. Paging
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Interrupts and Exceptions 2.5 Inter
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Interrupts and Exceptions 2.5.3 Int
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Interrupts and Exceptions Table 2-2
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System Management Mode 2.6 System M
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System Management Mode Figure 2-29.
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System Management Mode The new SMM
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System Management Mode During SMM o
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Protection The Current Privilege Le
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Virtual 8086 Mode 2.9 Virtual 8086
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TI486SLC/E Bus Interface 3-1
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Chapter 3 TI486SLC/E Bus Interface
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Overview Table 3-1. TI486SLCIE Sign
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Overview Table 3-2. Terminal Functi
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Page 106 and 107:
Page 108 and 109:
Overview 3.1.1 Bus Cycle Definition
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Overview Table 3-5 shows the state
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Functional Timing Figure 3-3. Bus A
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Functional Timing 3.2.2.1 Bus Cycle
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Functional Timing Non-Pipelined Wai
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Functional Timing Because of the de
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Functional Timing Pipelined Wait St
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Functional Timing Initiating and Ma
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Functional Timing Figure 3-12. Comp
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Functional Timing Figure 3-13. Inte
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Functional Timing Shutdown Indicati
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Functional Timing Figure 3-17. Pipe
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Functional Timing As shown in Figur
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Functional Timing Figure 3-19. Requ
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Functional Timing Figure 3-22. 8MI
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Functional Timing HALT Initiated Su
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Functional Timing 3.2.12 Float Figu
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TI486DLC/E Bus Interface 4-1
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Chapter 4 TI486DLC/E Bus Interface
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Overview Table 4-1. TI486DLCIE SIgn
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Overview Table 4-6. Signal States D
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Overview 4.1.2 Power Management 4.1
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Functional Timing 4.2 Functional Ti
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Functional Timing The TI486DLC/E da
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Functional Timing Non-Pipelined Rea
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Functional Timing Initiating and Ma
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Functional Timing Figure 4-8. Faste
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Functional Timing Figure 4-9. Vario
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Functional Timing Once a pipelined
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Functional Timing 4.2.3 Bus Cycles
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Functional Timing Pipelined Cycles
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Functional Timing LOCK is activated
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Functional Timing 4.2.6 Halt and Sh
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Functional Timing Figure 4-17. Pipe
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Functional Timing Figure 4-19. Non-
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Functional Timing The TI486DLC/E sa
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Functional Timing 4.2.9 Hold Acknow
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Functional Timing 4.2.10 Coprocesso
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Functional Timing 4.2.12 Power Mana
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Functional Timing Stopping the Inpu
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Electrical Specifications 5-1
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Chapter 5 Electrical Specifications
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ElectricalConnecnons It is recommen
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Recommended Operating Conditions 5.
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DC Electrical Characteristics Table
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AC Characteristics Figure 5-2. TI48
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AC Characteristics Table 5-9. AC Ch
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AC Characteristics Table 5-11. AC C
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____ AC Characteristics 5.5.3 RESET
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Mechanical Specifications 6-1
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Chapter 6 Mechanical Specifications
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Pin Assignments Table 6-1. TI486SLC
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Pin Assignments Figure 6-3. TI486DL
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Package Dimensions 6.2 Package Dime
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Thermal Characteristics 6.3 Thermal
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Instruction Set 7-1
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Chapter 7 Instruction Set This sect
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Instruction Fields 7.2 Instruction
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Instruction Fields 7.2.5 reg Field
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Instruction Fields Table 7-7. mod r
Page 242 and 243: Instruction Fields 7.2.11 sreg3 Fie
Page 244 and 245: Clock Count Summary 7.4 Clock Count
Page 246 and 247: --- --;.J -L 01 Table 7-17. Instruc
Page 248 and 249: I . ~ -.....J Table 7-17. Instructi
Page 250 and 251: Table 7-17. Instructions, Opcodes,
Page 254 and 255: -....J N (J.) Table 7-17. Instructi
Page 256 and 257: I I i I i Table 7-17. Instructions,
Page 258 and 259: ...... ...... '" Table 7-17. Instru
Page 260 and 261: -....J N co Table 7-17. Instruction
Page 262 and 263: "-.I ~ Table 7-17. Instructions, Op
Page 266 and 267: U Appendix A TI486 SMM Pro rammer's
Page 268 and 269: SMM Implementation A.2 SMM Implemen
Page 270 and 271: Figure A-1. SMM Memory Space Header
Page 272 and 273: SMM Implementation 6) NMI is the on
Page 274 and 275: Instruction Summary A.4 Instruction
Page 276 and 277: Instruction Summary A.4.3 Resume No
Page 278 and 279: Instruction Summary A.4.6 Save LDTR
Page 280 and 281: 8MI Handler Example A.5 SMI Handler
Page 282 and 283: 8MI Handler Example execute_halt: C
Page 284 and 285: 8MI Handler Example COMMENT A The T
Page 286 and 287: 8MI Handler Example arrl arr2 arr3
Page 288 and 289: .MODEL SMALL . STACK .386P INCLUDE
Page 290 and 291: Testing/Debugging SMM Code sgdt COM
Page 294 and 295: TI486 Power Management Features A.7
Page 296 and 297: Detection of Tl486 CPU A.9 Detectio
Page 298 and 299: Detection of SMM Capable Version A.
Page 300 and 301: i**********************************
Page 302 and 303: A.11 SMM Feature Comparison SMM Fea
Page 304 and 305: SMM Instruction Macros COMMENT A Co
Page 306 and 307: SMM Instruction Macros SMM Instruct
Page 308 and 309: A.14 Format of Data Used by SVDC/RS
Page 310 and 311: Altering SMM Code Limits A.1S Alter
Page 312 and 313: SMM Errata A.16 SMM Errata The foll
Page 314 and 315: Appendix B TI486 Cache Flush B.1 Ge
Page 316 and 317: Appendix C TI486 BIOS Modification
Page 318 and 319: Introduction Some example assembler
Page 320 and 321: Appendix D Ordering Information 0.1
Page 322: ~TEXAS INSTRUMENTS Printed in U.S.A
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