TI486 Microprocessor - Al Kossow's Bitsavers

Register Set
2.3.2.1 Control Registers
Figure 2-6. Control Registers
The control registers (CRO, CR2, and CR3) are shown in Figure 2-6. The CRO
register contains system control flags which control operating modes and
indicate the general state of the CPU. The lower 16 bits of CRO are referred
to as the Machine Status Word (MSW). The CRO bit definitions are described
in Table 2-5. The reserved bits in the CRO should not be modified.
When paging is enabled and a page fault is generated, the CR2 register retains
the 32-bit linear address of the address that caused the fault. CR3 contains the
20-bit base address of the page directory. The page directory must always be
aligned to a 4-KByte page boundary, therefore, the lower 12 bits of CR3 are
reserved.
When operating in protected mode, any program can read the control
registers. However, only privilege level 0 (most privileged) programs can
modify the contents of these registers.
31 12 11 0
PAGE DIRECTORY BASE REGISTER (PDBR)
CR3
PAGE FAULT LINEAR ADDRESS
CR2
P C
0 0
T E M P CRO
G D S M P E
3 3 2 1 1 5 4 3 2 0
1 0 9 8 6
= RESERVED
\ /
V
MSW
2-19