TI486 Microprocessor - Al Kossow's Bitsavers

Address Spaces
2.4.2 Memory Address Space
2.4.2.1 Offset Mechanism
The TI486SLC/E directly addresses up to 16 MBytes of physical memory and
the TI486DLC/E directly addresses up to 4 GBytes of physical memory.
Memory address space is accessed as bytes, words (16 bits) or doublewords
(32 bits). Words and doublewords are stored in consecutive memory bytes
with the low-order byte located in the lowest address. The. physical address
of a word or doubleword is the byte address of the low-order byte.
With the T1486, memory can be addressed using nine different addressing
modes. These addressing modes are used to calculate an offset address often
referred to as an effective address. Depending on the operating mode of the
CPU, the offset is then combined using memory management mechanisms to
create and address a physical memory location.
Memory management mechanisms on the TI486 consist of segmentation and
paging. Segmentation allows each program to use several independent,
protected address spaces. Paging supports a memory subsystem that
simulates a large address space using a small amount of RAM and disk
storage for physical memory. Either or both of these mechanisms can be used
for management of the TI486 memory address space.
The offset mechanism computes an offset (effective) address by adding
together up to three values: a base, an index, and a displacement. The base,
if present, is the value in one of eight 32-bit general registers at the time of the
execution of the instruction. The index, like the base, is a value that is
determined from one of the 32-bit general registers (except the ESP register)
when the instruction is executed. The index differs from the base in that the
index is first multiplied by a scale factor of 1, 2, 4 or 8 before the summation
is made. The third component added to the memory address calculation is the
displacement which is a value of up to 32 bits in length supplied as part of the
instruction. Figure 2-20 illustrates the calculation of the offset address.
Nine valid combinations of the base, index, scale factor, and displacement can
be used with the TI486 instruction set. These combinations are listed in
Table 2-17. The base and index both refer to contents of a register as
indicated by [Base] and [Index].
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