TI486 Microprocessor - Al Kossow's Bitsavers

Register Set
Figure 2-12. 16-Bit Task State Segment (TSS) Table
SELECTOR FOR TASK'S LOT
+2Ah
OS +28h
SS +26h
CS +24h
ES +22h
01 +20h
SI
BP
SP
+1Eh
+1Ch
+1Ah
BX +18h
OX +16h
CX +14h
AX +12h
FLAGS +10h
IP
SP FOR PRIVILEGE LEVEL 2
SS FOR PRIVILEGE LEVEL 2
+Eh
+Ch
+Ah
SP FOR PRIVILEGE LEVEL 1 +8h
SS FOR PRIVILEGE LEVEL 1 +6h
SP FOR PRIVILEGE LEVEL 0 +4h
SS FOR PRIVILEGE LEVEL 0 +2h
BACK LINK (OLO TSS SELECTOR)
+Oh
2.3.2.4 Configuration Registers
The TI486 contains six registers that do not exist on other 80x86
microprocessors. These registers include two Configuration Control Registers
(CCRO and CCR1) and four Address Region Registers (ARR1 through ARR4)
as listed in Table 2-8 and Table 2-9. The CCR and ARR registers exist in I/O
memory space and are selected by a "register index" number via I/O port 22h.
I/O port 23h is used for data transfer.
Each I/O port 23h data transfer must be preceded by an I/O port 22h register
selection, otherwise the second and later I/O port 23h operations are directed
off-chip and produce external I/O cycles. If the register index number is outside
the COh-CFh range, external I/O cycles will also occur.
2-26
Programming Interface