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AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

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<strong>AMD</strong><strong>64</strong> Technology 26568—Rev. 3.05—September 2003<br />

IGN<br />

Ignore. Field is ignored.<br />

indirect<br />

Referencing a memory location whose address is in a<br />

register or other memory location. The address may be an<br />

absolute or relative address. Compare direct.<br />

IRB<br />

The virtual-8086 mode interrupt-redirection bitmap.<br />

IST<br />

The long-mode interrupt-stack table.<br />

IVT<br />

The real-address mode interrupt-vector table.<br />

LDT<br />

Local descriptor table.<br />

legacy <strong>x86</strong><br />

The legacy <strong>x86</strong> architecture. See “Related Documents” on<br />

page xxv for descriptions of the legacy <strong>x86</strong> architecture.<br />

legacy mode<br />

An operating mode of the <strong>AMD</strong><strong>64</strong> architecture in which<br />

existing 16-bit and 32-bit applications and operating systems<br />

run without modification. A processor implementation of<br />

the <strong>AMD</strong><strong>64</strong> architecture can run in either long mode or legacy<br />

mode. Legacy mode has three submodes, real mode, protected<br />

mode, and virtual-8086 mode.<br />

long mode<br />

An operating mode unique to the <strong>AMD</strong><strong>64</strong> architecture. A<br />

processor implementation of the <strong>AMD</strong><strong>64</strong> architecture can<br />

run in either long mode or legacy mode. Long mode has two<br />

submodes, <strong>64</strong>-bit mode and compatibility mode.<br />

lsb<br />

Least-significant bit.<br />

LSB<br />

Least-significant byte.<br />

xviii Preface

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