09.01.2013 Views

AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

26568—Rev. 3.05—September 2003 <strong>AMD</strong><strong>64</strong> Technology<br />

MULPS Multiply Packed Single-Precision Floating-Point<br />

Multiplies each of the four packed single-precision floating-point values in first source<br />

operand by the corresponding packed single-precision floating-point value in the<br />

second source operand and writes the result of each multiplication operation in the<br />

corresponding doubleword of the destination (first source). The first<br />

source/destination operand is an XMM register. The second source operand is another<br />

XMM register or <strong>128</strong>-bit memory location.<br />

Mnemonic Opcode Description<br />

MULPS xmm1, xmm2/mem<strong>128</strong> 0F 59 /r Multiplies packed single-precision floating-point values in an XMM<br />

register and another XMM register or <strong>128</strong>-bit memory location and<br />

writes the results in the destination XMM register.<br />

Related Instructions<br />

MULPD, MULSD, MULSS, PFMUL<br />

rFLAGS Affected<br />

None<br />

multiply<br />

multiply<br />

xmm1 xmm2/mem<strong>128</strong><br />

127 96 95 <strong>64</strong> 63 32<br />

31<br />

0<br />

multiply<br />

multiply<br />

127 96 95 <strong>64</strong> 63 32 31<br />

0<br />

mulps.eps<br />

MULPS 193

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!