AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

26568—Rev. 3.05—September 2003 AMD64 Technology
ANDNPD Logical Bitwise AND NOT
Packed Double-Precision Floating-Point
Performs a bitwise logical AND of the two packed double-precision floating-point
values in the second source operand and the one’s-complement of the corresponding
two packed double-precision floating-point values in the first source operand and
writes the result in the destination (first source). The first source/destination operand
is an XMM register. The second source operand is another XMM register or 128-bit
memory location.
Mnemonic Opcode Description
ANDNPD xmm1, xmm2/mem128 66 0F 55 /r Performs bitwise logical AND NOT of two packed doubleprecision
floating-point values in an XMM register and another
XMM register or 128-bit memory location and writes the result in
the destination XMM register.
Related Instructions
ANDNPS, ANDPD, ANDPS, ORPD, ORPS, XORPD, XORPS
rFLAGS Affected
None
MXCSR Flags Affected
None
xmm1 xmm2/mem128
127 64 63 0 127 64 63 0
invert
AND
invert
AND
andnpd.eps
ANDNPD 15