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AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

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26568—Rev. 3.05—September 2003 <strong>AMD</strong><strong>64</strong> Technology<br />

� FXSAVE and FXRSTOR, indicated by bit 24 of CPUID<br />

standard function 1 and extended function 8000_0001h.<br />

� SSE, indicated by bit 25 of CPUID standard function 1.<br />

� SSE2, indicated by bit 26 of CPUID standard function 1.<br />

The <strong>128</strong>-bit media instructions can be used in legacy mode or<br />

long mode. Their use in long mode is available if the following<br />

CPUID function is set:<br />

� Long Mode, indicated by bit 29 of CPUID extended function<br />

8000_0001h.<br />

Compilation of <strong>128</strong>-bit media programs for execution in <strong>64</strong>-bit<br />

mode offers four primary advantages: access to the eight<br />

extended XMM registers (for a register set consisting of<br />

XMM0–XMM15), access to the eight extended, <strong>64</strong>-bit generalpurpose<br />

registers (for a register set consisting of<br />

GPR0–GPR15), access to the <strong>64</strong>-bit virtual address space, and<br />

access to the RIP-relative addressing mode.<br />

For further information, see:<br />

� “<strong>128</strong>-<strong>Bit</strong> Media and Scientific Programming” in <strong>Volume</strong> 1.<br />

� “Summary of Registers and Data Types” in <strong>Volume</strong> 3.<br />

� “Notation” in <strong>Volume</strong> 3.<br />

� “Instruction Prefixes” in <strong>Volume</strong> 3.<br />

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