AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

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AMD64 Technology 26568—Rev. 3.05—September 2003 Exceptions Exception Real Invalid opcode, #UD X X 356 SHUFPS Virtual 8086 Protected Cause of Exception X X X X The SSE instructions are not supported, as indicated by bit 25 of CPUID standard function 1. The emulate bit (EM) of CR0 was set to 1. X X X The operating-system FXSAVE/FXRSTOR support bit (OSFXSR) of CR4 was cleared to 0. Device not available, #NM X X X The task-switch bit (TS) of CR0 was set to 1. Stack, #SS X X X A memory address exceeded the stack segment limit or was non-canonical. General protection, #GP X X X X A memory address exceeded a data segment limit or was non-canonical. A null data segment was used to reference memory. X X X The memory operand was not aligned on a 16-byte boundary. Page fault, #PF X X A page fault resulted from the execution of the instruction.
26568—Rev. 3.05—September 2003 AMD64 Technology SQRTPD Square Root Packed Double-Precision Floating-Point Computes the square root of each of the two packed double-precision floating-point values in an XMM register or 128-bit memory location and writes the result in the corresponding quadword of another XMM register. Taking the square root of +infinity returns +infinity. Mnemonic Opcode Description SQRTPD xmm1, xmm2/mem128 66 0F 51 /r Computes square roots of packed double-precision floatingpoint values in an XMM register or 128-bit memory location and writes the result in the destination XMM register. Related Instructions RSQRTPS, RSQRTSS, SQRTPS, SQRTSD, SQRTSS rFLAGS Affected None xmm1 xmm2/mem128 127 64 63 0 127 64 63 0 square root square root sqrtpd.eps SQRTPD 357
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