AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

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AMD64 Technology 26568—Rev. 3.05—September 2003 400 XORPS
26568—Rev. 3.05—September 2003 AMD64 Technology Index Numerics 16-bit mode.................................................. xv 32-bit mode.................................................. xv 64-bit mode.................................................. A xv ADDPD .......................................................... 4 ADDPS........................................................... 7 addressing, RIP-relative............................ xxi ADDSD ........................................................ 10 ADDSS ......................................................... 12 ANDNPD ..................................................... 15 ANDNPS ...................................................... 17 ANDPD ........................................................ 19 ANDPS......................................................... B 21 biased exponent.......................................... C xv CMPPD ........................................................ 23 CMPPS......................................................... 27 CMPSD ........................................................ 30 CMPSS ......................................................... 33 COMISD....................................................... 36 COMISS ....................................................... 39 commit ........................................................ xvi compatibility mode..................................... xv CVTDQ2PD ................................................. 42 CVTDQ2PS.................................................. 44 CVTPD2DQ ................................................. 46 CVTPD2PI ................................................... 49 CVTPD2PS .................................................. 52 CVTPI2PD ................................................... 55 CVTPI2PS.................................................... 57 CVTPS2DQ.................................................. 59 CVTPS2PD .................................................. 62 CVTPS2PI.................................................... 64 CVTSD2SI ................................................... 67 CVTSD2SS................................................... 70 CVTSI2SD ................................................... 73 CVTSI2SS .................................................... 76 CVTSS2SD................................................... 79 CVTSS2SI .................................................... 81 CVTTPD2DQ............................................... 84 CVTTPD2PI................................................. 87 CVTTPS2DQ ............................................... 90 CVTTPS2PI ................................................. 93 CVTTSD2SI ................................................. 96 CVTTSS2SI ................................................. D 99 direct referencing...................................... xvi displacements............................................ xvi DIVPD ....................................................... 102 DIVPS........................................................ 105 DIVSD ....................................................... 108 DIVSS ........................................................ 110 double quadword....................................... xvi doubleword ................................................ E xvi eAX–eSP register ..................................... xxii effective address size............................... xvii effective operand size.............................. xvii eFLAGS register...................................... xxiii eIP register .............................................. xxiii element ..................................................... xvii endian order ............................................. xxv exception................................................... xvii exponent ..................................................... F xv flush........................................................... xvii FXRSTOR ................................................. 113 FXSAVE .................................................... I 116 IGN ........................................................... xviii indirect..................................................... instructions xviii 128-bit media ............................................. 1 SSE ............................................................. 1 SSE-2 .......................................................... 1 L LDMXCSR ................................................ 118 legacy mode ............................................. xviii legacy x86 ................................................ xviii long mode................................................. xviii LSB ........................................................... xviii lsb ............................................................. M xviii mask ........................................................... xix MASKMOVDQU ....................................... 120 MAXPD ..................................................... 122 MAXPS...................................................... 124 MAXSD ..................................................... 127 MAXSS ...................................................... 129 Index 401
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