AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

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AMD64 Technology 26568—Rev. 3.05—September 2003 Exception Real Underflow exception (UE) X X X A rounded result was too small to fit into the format of the destination operand. Denormalized-operand exception (DE) X X X A source operand was a denormal value. Precision exception (PE) X X X A result could not be represented exactly in the destination format. 198 MULSD Virtual 8086 Protected Cause of Exception
26568—Rev. 3.05—September 2003 AMD64 Technology MULSS Multiply Scalar Single-Precision Floating-Point Multiplies the single-precision floating-point value in the low-order doubleword of first source operand by the single-precision floating-point value in the low-order doubleword of the second source operand and writes the result in the low-order doubleword of the destination (first source). The three high-order doublewords of the destination are not modified. The first source/destination operand is an XMM register. The second source operand is another XMM register or 32-bit memory location. Mnemonic Opcode Description MULSS xmm1, xmm2/mem32 F3 0F 59 /r Multiplies low-order single-precision floating-point values in an XMM register and another XMM register or 32-bit memory location and writes the result in the low-order doubleword of the destination XMM register. Related Instructions MULPD, MULPS, MULSD, PFMUL rFLAGS Affected None xmm1 xmm2/mem32 127 32 31 0 127 32 31 0 multiply mulss.eps MULSS 199
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